1
Download eZ80F91 Development Kit User Manual
Transcript
eZ80F91 Development Kit User Manual 57 Schematics eZ80F91 Development Platform Figure 18 through Figure 22 displays the layout of the eZ80F91 Development Platform. 5 4 9VDC SCL SDA D 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 GND -MOD_DIS -MWAIT EM_D0 -CS3 GND EM_D7 EM_D6 EM_D5 EM_D4 EM_D3 EM_D2 EM_D1 GND PC7_RI1 PC6_DCD1 PC5_DSR1 PC4_DTR1 PC3_CTS1 PC2_RTS1 PC1_RXD1 PC0_TXD1 C GND GND A8 A10 A12 A14 GND A16 A18 A20 A22 VDD -RESET -BUSACK -NMI GND D0 D2 D4 D6 GND -CS0 -CS2 -MEMRQ VDD -RST ID_2 ID_1 ID_0 -CON_DIS GND -DIS_ETH GND PD7_RI0 PD6_DCD0 PD5_DSR0 PD4_DTR0 PD3_CTS0 PD2_RTS0 PD1_RXD0 PD0_TXD0 GND PB7_MOSI PB6_MISO PB5_T5_O PB4_T4_O PB3_SCK PB2_SS PB1_T1_I PB2_SS PB0_T0_I PB1_T1_I PB0_T0_I A1 A3 A5 A7 GND A9 A11 A13 A15 VDD R3 10K GND A17 A19 A21 A23 -CS1 -CS_EX -IORQ J4 VDD 1 3 5 GND VDD 1OE 2OE VCC GND 20 10 2 4 6 8 11 13 15 17 A1 A2 A3 A4 A5 A6 A7 A8 GND 1 19 1OE 2OE Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 18 16 14 12 9 7 5 3 VCC GND 20 10 TVCC_RESETn VDD 1 3 5 7 9 11 13 1 2 4 6 8 10 12 14 DTR 1 GND R20 0 2 GND A8 A9 A10 A11 A12 A13 A14 A15 2 U21 HEADER 2 -M_CS0 -M_CS1 -M_CS2 -M_IORQ -M_MEMRQ -M_WR -M_RD -M_CS3 M_PHI VDD GND C31 0.1uF A16 A17 A18 A19 A20 A21 A22 A23 GND 4 2 3 4 5 6 7 8 9 10 11 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 23 22 21 20 19 18 17 16 15 14 1 13 OE1 OE2 VCC GND 24 12 -CS0 -CS1 -CS2 -IORQ -MEMRQ -WR -RD -CS3 PHI C VDD GND C34 0.1uF 74LVC827/SO VDD GND J12 VCC C33 0.1uF 1 2 3 VDD 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 MODEM's AGND -MOD_DIS D[7:0] U7 D[7:0] VCC MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 -M_RD -L_RD 2 3 4 5 6 7 8 9 A0 A1 A2 A3 A4 A5 A6 A7 1 19 DIR OE B0 B1 B2 B3 B4 B5 B6 B7 18 17 16 15 14 13 12 11 VCC GND 20 10 D0 D1 D2 D3 D4 D5 D6 D7 B VDD C1 0.1uF 74LVC245/SO GND MD[7:0] MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 VCC VCC GND PC4_DTR1 PC6_DCD1 PC3_CTS1 PC5_DSR1 PC7_RI1 PC0_TXD1 PC1_RXD1 PC2_RTS1 VDD GND VDD GND Connectors A ZiLOG 910 E. Hamilton Avenue Title HEADER 9 0 HEADER 32 Schematic, eZ80L92 Evaluation Board MODEM CONNECTORS con 7x2 5 D GND -FLASHWE GND 1 2 R21 TX D4 1 -MRESET 0 2 D3 TMS PRSTn TRIGOUT -MRESET R8 0 R9 RX D2 P1 TDI TDO TCK 4 3 J1 1 2 J9 2 7 GND WP NC Header 3 J5 M_TIP M_RING PRSTn TCK TDI 1 VDD SCL HEADER 2 18 16 14 12 9 7 5 3 R19 DCD SDA 8 C30 0.1uF U5 MA16 MA17 MA18 MA19 MA20 MA21 MA22 MA23 M_TIP M_RING D1 5 VCC A0 A1 AT24C128 -DIS_IRDA GND 74LVC244A -DIS_IRDA -MWAIT GND -NMI -RESET 7 GND R5 1K TC74LVT125 1 19 VDD TC74LVC08 VDD 20 10 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 ZDI INTERFACE 2 4 6 1 2 74LVC244A R4 10K 1 7 U8A A1 A2 A3 A4 A5 A6 A7 A8 Header 3x2 R24 10K 3 GND 2 4 6 8 11 13 15 17 R2 10K PB6_MISO PB4_T4_O PB2_SS PB0_T0_I PC7_RI1 PC5_DSR1 PC3_CTS1 PC1_RXD1 PD7_RI0 GND PD4_DTR0 PD2_RTS0 PD0_TXD0 TDI TRIGOUT TMS M_PHI GND VCC GND J2 VDD GND SDA 6 1 2 GND SCL J7 MD6 -M_IORQ -M_RD INSTRD -BUSREQ 2 A 1OE 2OE A0 A1 A2 A3 A4 A5 A6 A7 18 16 14 12 9 7 5 3 1 U2 A[23:0] 74LVC244A U3 MA8 MA9 MA10 MA11 MA12 MA13 MA14 MA15 GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 10K 14 1 14 U9A 1 19 -DIS_FL MA23 -M_CS1 MD0 MD2 MD4 A1 A2 A3 A4 A5 A6 A7 A8 HEADER 2 VDD 2 VDD 2 4 6 8 11 13 15 17 VDD GND GND GND Header 25x2 -WR INSTRD -BUSREQ PHI Header 30x2 3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 VDD PHI GND D1 D3 D5 D7 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA7 MA9 MA14 MA16 MA1 MA12 MA20 MA17 -DIS_FL A[23:0] U1 VDD JP2 PB7_MOSI PB5_T5_O PB3_SCK PB1_T1_I GND PC6_DCD1 PC4_DTR1 PC2_RTS1 PC0_TXD1 PD6_DCD0 PD5_DSR0 PD3_CTS0 PD1_RXD0 TDO GND TCK RTC_VDD SCL SDA -FLASHWE -M_CS3 -RST VDD HALT_SLP VDD VDD GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 MA0 MA3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 Header 25x2 R1 10K Header 30x2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 A0 A2 A4 A6 B ID_2 ID_1 ID_0 J8 VDD -RD 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 GND MA8 MA13 MA15 MA18 MA19 MA2 MA11 MA4 MA5 -DIS_ETH MA21 MA22 -M_CS0 -M_CS2 MD1 MD3 MD5 MD7 -M_MEMRQ GND -M_WR -BUSACK J6 VCC 9V_DC 3 JP1 MA6 MA10 DO NOT USE J6_17 AND J6_35 3 Size B Document Number Date: Friday, October 10, 2003 2 Rev 96C0858-001 C Sheet 1 of 4 1 Figure 18. eZ80F91 Development Platform Schematic Diagram, #1 of 5 UM014220-0508 Schematics
