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Book E Process ID
Construction of Virtual Address (continued)
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PID register
xxxx_xxxx
+
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effective address <ea>
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Every effective address (instruction or data) also has a
process ID value associated with it.
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Set up by OS to differentiate between tasks.
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Process ID is saved in TLB entries. Therefore, not all TLB entries must be
flushed on a task (process) switch.
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PID can be ignored by TLB entries (TID = 0), for sharing of TLB entries.
Since the PID is compared with the TID in the on-chip TLBs, we do not have
to flush the TLBs every time we have a task switch.
The Book E architecture states that when a TLB entry has the TID value
equal to all zeroes, then that entry is automatically compared with the
effective address of every access. It essentially says that there is no
comparison with the current PID. So a TID value of 0 in the TLB entry is not
compared with the PID value as it will match with every PID value. Since it is
a global match, it can be used for TLB entries that we want to share among
all tasks.
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