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UM10116 NXP Semiconductors P89LPC933/934/935/936 User manual Revision history Rev Date 03 20090210 02 01 Description 20050609 20050304 • The format of this user manual has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Table 18 “A/D Mode register B (ADMODB - address A1h) bit description”. Corrected ENDAC0 description. • Corrected typographical error in Table 50 “Capture compare control register (CCRx address Exh) bit description”. Corrected Table 107 “Data EEPROM control register (DEECON address F1h) bit allocation” and Table 108 “Data EEPROM control register (DEECON address F1h) bit description”. • Revised Table 52 “Output compare pin behavior.” for OCMx1:0 =10. Initial version Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] UM10116_3 User manual © NXP B.V. 2009. All rights reserved. Rev. 03 — 10 February 2009 2 of 149
