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UM10116 NXP Semiconductors P89LPC933/934/935/936 User manual control bits ENT0 and ENT1 in the AUXR1 register, and apply to Timer 0 and Timer 1 respectively. The port outputs will be a logic 1 prior to the first timer overflow when this mode is turned on. In order for this mode to function, the C/T bit must be cleared selecting PCLK as the clock source for the timer. 9. Real-time clock system timer The P89LPC933/934/935/936 has a simple Real-time Clock/System Timer that allows a user to continue running an accurate timer while the rest of the device is powered down. The Real-time Clock can be an interrupt or a wake-up source (see Figure 23). The Real-time Clock is a 23-bit down counter. The clock source for this counter can be either the CPU clock (CCLK) or the XTAL1-2 oscillator, provided that the XTAL1-2 oscillator is not being used as the CPU clock. If the XTAL1-2 oscillator is used as the CPU clock, then the RTC will use CCLK as its clock source regardless of the state of the RTCS1:0 in the RTCCON register. There are three SFRs used for the RTC: RTCCON — Real-time Clock control. RTCH — Real-time Clock counter reload high (bits 22 to 15). RTCL — Real-time Clock counter reload low (bits 14 to 7). The Real-time clock system timer can be enabled by setting the RTCEN (RTCCON.0) bit. The Real-time Clock is a 23-bit down counter (initialized to all 0’s when RTCEN = 0) that is comprised of a 7-bit prescaler and a 16-bit loadable down counter. When RTCEN is written with logic 1, the counter is first loaded with (RTCH, RTCL, ‘1111111’) and will count down. When it reaches all 0’s, the counter will be reloaded again with (RTCH, RTCL, ‘1111111’) and a flag - RTCF (RTCCON.7) - will be set. Power-on reset RTCH RTCL XTAL2 RTC Reset XTAL1 Reload on underflow MSB LSB LOW FREQ. MED. FREQ. HIGH FREQ. 7-bit prescaler ÷128 23-bit down counter CCLK internal oscillators Wake-up from power-down Interrupt if enabled (shared with WDT) RTCF RTCEN RTCS1 RTCS2 RTC underflow flag RTC enable RTC clk select ERTC 002aaa924 Fig 23. Real-time clock/system timer block diagram. UM10116_3 User manual © NXP B.V. 2009. All rights reserved. Rev. 03 — 10 February 2009 56 of 149
