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Chapter 3: System Peripherals
3.7.8 Low Power Modes
The STR9 has three low power modes in addition to its normal run mode. These are Special Interrupt Run Mode,
Idle Mode and Sleep Mode.
The STR9 has four different operating modes.
Normal mode
CPU clock
= RCLK
Interrupt mode
CPU clock
= MCLK
CPU clock
= Halted
Idle mode
Peripheral clocks = Running
Sleep
CPU clock
= Halted
Peripheral clocks = Halted
3.7.8.1 Special Interrupt Run Mode
The first of these modes is not strictly speaking a low power mode. The Special Interrupt Run Mode will switch the
CPU clock from RCLK to the master clock MCLK when an interrupt occurs. This allows you to configure the PLL
to generate MCLK at the maximum 96MHz. This can be divided down by the RCLK divider. Then during normal
operation the CPU can be running at say 48MHz but will immediately start processing instructions at the full
96MHz as soon as an interrupt is generated and return back to the normal run mode frequency at the end of the
interrupt. The special interrupt mode is enabled by setting the CPU_INTR bit in the SCU power management
register.
The power control register is used to enable the special interrupt mode. It can also be used to enter the idle
and sleep modes. The FLASH PD DBG bit can be used to keep the FLASH memory from powering down
during a debug session.
The remaining two interrupt modes can be entered by setting the appropriate bit pattern in the power mode field
of the power management register.
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