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Gpibdev5.s
.area memory(abs)
.org 0xFFF2
.word _route_nat9914_interrupts
.org 0xFFFE
.word _main
.org 0xE000
.globl _main
_main:
GPIBDEV5.56::
; /*
; gpibdevc.c
7/28/97
;
;
GPIB DEVICE implementation for a small microcontroller operating in tandem
;
with a NAT9914 chip. This C code is designed for a microcontroller. It implements a
;
GPIB voltage query, tare, Group Execute Trigger, and DCAS commands.
;
;
At startup, this code initializes the microcontroller and the NAT9914 and then waits
;
in an idle state until the NAT9914 sends an interrupt. The device interprets the
;
interrupt and tares, resets, executes on the G.E.T. command, reads the voltage and
;
stuffs it into a buffer, or outputs the contents of the buffer to the Active GPIB
;
listener.
;
;
read_voltage(), handle_GET_trigger(), and adjust_tare() are device specific and
;
shown here as stubs. The NAT9914 interrupts the microcontroller for BI, BO, GET,
;
and SDC/DCL.
; */
;
; /* assert() statements draw attention to internal errors */
; /* #include <assert.c> */
;
; #define assert(a) {}
;
; #include "gpibdevc.h"
; #pragma interrupt_handler route_nat9914_interrupts
;
; #define USING_INTERRUPTS
;
; /* to input and output on a microcontroller, read or write to a memory location
; */
; #define inp(io_address) *(unsigned char *)io_address
; #define outp(io_address, o_data) *( unsigned char *)io_address = o_data;
;
; /* state variable. one of the following values
;
idle_state
1
;
reading_state
2
;
writing_state
3
; */
; u_8 GPIB_state;
;
; /* buffer variables
;
index is an offset from the base address of the i/o buffer.
;
io_buffer is both the GPIB input and output buffer.
; */
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