Download INTERRUPT TIMED CLOCK ABSTRACT: This laboratory will

PSRR ($18)
7,6,5
4,3
2,1,0
0
1
0
68
all
all
7
6
5,4,3
2
1
0
7
6
5,4,3
2
1
0
1
0
1
0
0
0
1
x
1
0
0
0
1
x
x
x
3
0/1
2
0/1
1
0/1
0
0/1
7
6
5
4
1
0
1
0
2
1
0
0
0
0/1
64
PIVR ($44)
PADDR
PBDDR
PACR ($82)
PBCR ($82)
PBDR
PADR
PSR
TCR ($A1)
TIVR
vector
CPRH/CPRM/CPRL
INTERRUPTS
TSR
no DMA
set up interrupt pins
H1 > H2 > H3 > H4 priority
H1 vector at (68+0)*4 = $110,
H2 vector at (68+1)*4 = $114,
H3 vector at (68+2)*4 = $118,
H4 vector at (68+3)*4 = $11B
all pins (LED's) are outputs
all pins (switches) are inputs
mode 0 submode 1X
mode 0 submode 1X
H2 is output pin (LED above H1)
no H2 interrupts
accept H1 interrupts
don't care
mode 0 submode 1X
mode 0 submode 1X
H4 is output pin (LED above H3)
no H4 interrupts
accept H3 interrupts
don't care
input port
output port
status register for
H1,H2,H3,H4
H4 status (set to 1 to clear
interrupt)
H3 status (set to 1 to clear
interrupt)
H2 status (set to 1 to clear
interrupt)
H1 status (set to 1 to clear
interrupt)
set appropriate pin functions
reload counter when countdown
through zero
use pre-scaler ÷ 32
stop/start timer
64*4=$100, the address of the
counter preload registers
YOU FIGURE OUT FOR 1/10-th SECOND
0
0/1
status of timer (ZDS bit), 1
indicates rollover,
set to 0 to clear timer
interrupt