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Download A-level Electronics Major Project Theodore
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Contents Summary ............................................................................1 Part 1: The microprocessor system Choice of microprocessor ................................................3 Rest of microprocessor system ........................................5 RAM ................................................................................5 ROM ................................................................................5 Modem connection ........................................................6 Real time clock and timing ............................................6 Other inputs/outputs ........................................................7 Memory map ........................................................................8 Revisions ........................................................................9 Microprocessor control signals ........................................11 Clock................................................................................11 Reset and Halt ................................................................12 Function code outputs (FC0-FC2) ................................14 Interrupt control lines (/IPL0-/IPL2) ................................14 Bus arbitration control line (/BR, /BG, /BGACK) ............14 Asynchronous bus control signals ................................15 Address decoding ................................................................17 I/O decoding ....................................................................18 RAM and ROM ....................................................................20 RAM ................................................................................20 ROM ................................................................................22 Initial testing ........................................................................27 Digital inputs and outputs....................................................29 Digital output....................................................................29 Digital input ....................................................................32 Exception vector code ........................................................33 6800 series bus cycles ........................................................35 6800 series peripherals ........................................................38 6821 Peripheral Interface Adapter ................................38 6818 Real Time Clock ....................................................39 6522 Versatile Interface Adapter ....................................43 Serial port ............................................................................45 6850 Asynchronous Communications Interface Adapter 45 Data rate selector ............................................................45 Line drivers ....................................................................49 Interrupts ............................................................................51 Copyright Theo Markettos 1997. This may be used for educational and non-profit making purposes only. The author may be reached at [email protected] 1
