Download User Manual COM Express Basic Module MSC C6B-7S

MSC C6B-7S
Rev. 1.8
Feature
Options
User's Manual
Description
PCI Express Root Port
Enabled,
Disabled
Control the PCI Express Root Port.
ASPM Support
Disabled,L0s,
L1, L0sL1, Auto
Set the ASPM Level: Force L0 - Force all links to L0
State : AUTO - BIOS auto configure : DISABLE Disables ASPM
For more information see also technotes in chapter
6.7
URR
Enabled,
Disabled
Enable or disable PCI Express Unsupported
Request Reporting.
FER
Enabled,
Disabled
Enable or disable PCI Express Device Fatal Error
Reporting.
NFER
Enabled,
Disabled
Enable or disable PCI Express Device Non-Fatal
Error Reporting.
CER
Enabled,
Disabled
Enable or disable PCI Express Device Correctable
Error Reporting.
CTO
Enabled,
Disabled
Enable or disable PCI Express Completion Timer
TO.
SEFE
Enabled,
Disabled
Enable or disable Root PCI Express System Error
on Fatal Error.
SENFE
Enabled,
Disabled
Enable or disable Root PCI Express System Error
on Non-Fatal Error.
SECE
Enabled,
Disabled
Enable or disable Root PCI Express System Error
on Correctable Error.
PME SCI
Enabled,
Disabled
Enable or disable PCI Express PME SCI.
Hot Plug
Enabled,
Disabled
Enable or disable PCI Express Hot Plug.
PCIe Speed
Gen1, Gen2
Select PCI Express port Speed
Extra Bus Reserved
0-7
Extra Bus Reserved (0-7) for bridges behind this
Root Bridge.
Reserved Memory
1-20MB
Reserved Memory and Prefetchable Memory (120MB) Range for this Root Bridge.
Reserved I/O
Value
Reserved I/O (4K/8K/12K/16K/20K) Range for this
Root Bridge.
6.1.9.2 USB Configuration Submenu
Feature
Options
Description
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