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EFM8UB2 Reference Manual
Timers (Timer0, Timer1, Timer2, Timer3, Timer4, and Timer5)
Bit
Name
Reset
Access
1
EXTOSC_DIV_8
Description
Timer 2 clock is the external oscillator divided by 8 (synchronized with SYSCLK).
19.4.10 TMR2RLL: Timer 2 Reload Low Byte
Bit
7
6
5
4
3
Name
TMR2RLL
Access
RW
Reset
0x00
2
1
0
SFR Page = 0x0; SFR Address: 0xCA
Bit
Name
Reset
Access
Description
7:0
TMR2RLL
0x00
RW
Timer 2 Reload Low Byte.
When operating in one of the auto-reload modes, TMR2RLL holds the reload value for the low byte of Timer 2 (TMR2L).
When operating in capture mode, TMR2RLL is the captured value of TMR2L.
19.4.11 TMR2RLH: Timer 2 Reload High Byte
Bit
7
6
5
4
3
Name
TMR2RLH
Access
RW
Reset
0x00
2
1
0
SFR Page = 0x0; SFR Address: 0xCB
Bit
Name
Reset
Access
Description
7:0
TMR2RLH
0x00
RW
Timer 2 Reload High Byte.
When operating in one of the auto-reload modes, TMR2RLH holds the reload value for the high byte of Timer 2 (TMR2H).
When operating in capture mode, TMR2RLH is the captured value of TMR2H.
19.4.12 TMR2L: Timer 2 Low Byte
Bit
7
6
5
4
3
Name
TMR2L
Access
RW
Reset
0x00
2
1
0
SFR Page = 0x0; SFR Address: 0xCC
Bit
Name
Reset
Access
Description
7:0
TMR2L
0x00
RW
Timer 2 Low Byte.
In 16-bit mode, the TMR2L register contains the low byte of the 16-bit Timer 2. In 8-bit mode, TMR2L contains the 8-bit low
byte timer value.
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