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SV1C Specifications Timing Generator Performance Resolution at Maximum Data Rate 31.25 mUI Differential Non‐Linearity Error +/‐ 0.5 LSB Integral Non‐Linearity Error +/‐ 5 ps Range Skew Lane to Lane Skew Measurement Accuracy Table 4 Resolution (as a percentage of UI) improves for lower data rate. Consult factory. Unlimited +/‐ 5 ps Clocking Characteristics Parameter Value Units Description and Conditions Internal Time Base Number of Internal Frequency References 2 Relevant for future customization. Embedded Clock Applications Transmit Timing Modes System Receive Timing Modes Lane to Lane Tracking Bandwidth 4 MHz Single‐Lane CDR Tracking Bandwidth 80 MHz Extracted Clock can be extracted from one data receive channels in order to drive all transmitter channels. System Extracted All channels have clock recovery for extracted mode operation. Maximum native CDR bandwidth of individual receiver channels. Forwarded Clock Applications Transmit Timing Modes Receive Timing Modes Clock Tracking Bandwidth System Forwarded Channel 1 acts as forwarded clock samplers. System Forwarded 4 Channel 1 acts as forwarded clock samplers. MHz Second order critically damped response. Spread Spectrum Support Receive Lanes Track SSC Data Yes Transmit Lanes Generate SSC Data Yes Requires operation in extracted clock mode. Generated SSC Down Spread 0.5 % Spreading Frequency 30 kHz Consult factory for availability. Page 13
