Download TSC693E Memory Controller / User`s Manual

TSC693E
TABLE OF CONTENTS
Page
1.
1.1.
1.2.
1.2.1.
1.2.2.
1.3.
1.4.
1.4.1.
1.4.2.
1.4.3.
INTRODUCTION ....................................................................................... 4
Scope ......................................................................................................... 4
Documents................................................................................................. 5
Applicable Documents............................................................................ 5
Reference Documents ............................................................................. 5
Glossary..................................................................................................... 6
Definitions................................................................................................. 7
Bit Numbering ........................................................................................ 7
Signal Names .......................................................................................... 7
Registers.................................................................................................. 7
2.
2.1.
GENERAL OVERVIEW OF ERC32.......................................................... 8
ERC32 Overview ...................................................................................... 8
3.
3.1.
3.2.
3.2.1.
3.2.2.
3.2.2.1.
3.2.3.
3.2.3.1.
3.2.4.
3.2.5.
3.2.5.1.
3.2.6.
3.3.
3.4.
3.5.
3.5.1.
3.5.2.
3.5.3.
3.5.4.
3.5.5.
3.6.
3.7.
3.7.1.
3.7.2.
3.7.3.
3.8.
3.9.
3.9.1.
3.9.2.
3.9.3.
MEMORY CONTROLLER FUNCTIONS............................................... 10
Data Types............................................................................................... 12
Memory Interface .................................................................................... 12
Memory Control Signals....................................................................... 12
RAM ..................................................................................................... 12
Extended RAM ................................................................................... 13
Boot PROM .......................................................................................... 14
Extended PROM................................................................................. 14
Exchange Memory ................................................................................ 15
I/O ......................................................................................................... 15
Extended I/O....................................................................................... 17
MEC Memory Map............................................................................... 18
DMA Interface......................................................................................... 19
Bus Arbiter .............................................................................................. 20
Execution Modes..................................................................................... 20
Reset Mode ........................................................................................... 22
Run Mode.............................................................................................. 22
System Halt Mode................................................................................. 22
Power-Down Mode............................................................................... 23
Error Halt Mode.................................................................................... 23
Wait-State and Timeout Generator.......................................................... 23
Memory Access Protection...................................................................... 24
Unimplemented Areas .......................................................................... 24
RAM Write Access Protection.............................................................. 25
Boot PROM Write Protection............................................................... 26
Register Access Protection...................................................................... 26
EDAC ...................................................................................................... 27
Check Bit Generator.............................................................................. 28
Syndrome Generator ............................................................................. 29
Syndrome Detector ............................................................................... 30
MATRA MHS
Rev. D (10 Apr. 97)
2