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Download RM0031 - STMicroelectronics
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RM0031 13 Direct memory access controller (DMA) Direct memory access controller (DMA) This section applies to low-density STM8L05xx/STM8L15xx devices, medium-density STM8L05xx/STM8L15xx devices, medium+ density STM8L05xx/STM8L15xx devices and high-density STM8L05xx/STM8L15xx/STM8L16xx devices, unless otherwise specified. 13.1 DMA introduction Direct memory access (DMA) is used to provide high-speed data transfer between peripherals and memory as well as between memory to memory. Data can be quickly moved by DMA without any CPU actions. This keeps CPU resources free for other operations. The DMA controller has 4 channels. Each channel is dedicated to managing memory access requests from one or more peripherals. It has an arbiter for handling the priority between DMA requests. Glossary The term DMA refers to direct memory access. A DMA transaction consists of a complete DMA read/write operation on a set of softwareprogrammable data blocks. A DMA transaction can be divided into single DMA transfers. A DMA transfer consists of a single read/write operation on a data block. It cannot be interrupted. A data block is either an 8-bit or a 16-bit data depending on the selected transfer size. DocID15226 Rev 11 177/595 202
