Download System Resets, Interrupts, and Operating Modes

I 2C Module Registers
I2CTCTL, I2C Transmit Control Register
7
6
I2CWORD
I2CRM
rw–0
rw–0
5
4
I2CSSELx
rw–0
rw–0
3
2
1
0
I2CTRX
I2CSTB
I2CSTP
I2CSTT
rw–0
rw–0
rw–0
rw–0
Modifiable only when I2CEN = 0
I2CWORD
Bit 7
I2C word mode. Selects byte or word mode for the I2C data register.
0
Byte mode
1
Word mode
I2CRM
Bit 6
I2C repeat mode
0
I2CNDAT defines the number of bytes transmitted.
1
Number of byte transmitted is controlled by software. I2CNDAT is
unused.
I2CSSELx
Bits
5–4
I2C clock source select. When MST = 1 and arbitration is lost, the external SCL
signal is automatically used.
00 No clock – I2C module is inactive
01 ACLK
10 SMCLK
11 SMCLK
I2CTRX
Bit 3
I2C transmit. This bit selects the transmit or receive function for the I2C
controller when MST = 1. When MST = 0, the R/W bit of the address byte
defines the data direction and I2CTRX reflects the direction of the SDA pin.
0
Receive mode. Data is received on the SDA pin.
1
Transmit mode. Data transmitted on the SDA pin.
I2CSTB
Bit 2
Start byte. Setting the I2CSTB bit when MST = 1 initiates a start byte.
0:
No action
1:
Send START condition, start byte (03h), but no stop condition.
I2CSTP
Bit 1
Stop bit. This bit is used to generate STOP condition. After the stop condition,
the I2CSTP is automatically cleared.
0:
No action
1:
Send STOP condition
I2CSTT
Bit 0
Start bit. This bit is used to generate a START condition. After the start
condition the I2CSTT is automatically cleared.
0:
No action
1:
Send START condition
USART Peripheral Interface, I 2C Mode
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