1
Download User Manual - Hytec Electronics Ltd
Transcript
Hytec Electronics Ltd MCS8522/UTM/3.0 Totaliser Memory Organisation of the sixteen 64 bit totaliser registers in FPGA RAM Memory 64 bit words for the totaliser values are read as four 16 bit words from the IP ram memory This memory is accessed when the ETM bit in the CSR is set to ‘1’. 16 x 64 bits FPGA RAM memory Memory allocation IP Card Address CSR 15=’1’ Channel 16 Totaliser 64bits Base + 60 Channel 15 Totaliser 64bits Base + 56 Channel 14 Totaliser 64bits Base + 52 Channel 13 Totaliser 64bits Base + 48 Channel 12 Totaliser 64bits Base + 44 Channel 11 Totaliser 64bits Base + 40 Channel 10 Totaliser 64bits Base + 36 Channel 9 Totaliser 64bits Base + 32 Channel 8 Totaliser 64bits Base + 28 Channel 7 Totaliser 64bits Base + 24 Channel 6 Totaliser 64bits Base + 20 Channel 5 Totaliser 64bits Base + 16 Channel 4 Totaliser 64bits Base + 12 Channel 3 Totaliser 64bits Base + 8 Channel 2 Totaliser 64bits Base + 4 Channel 1 Totaliser 64bits Most significant 16 bits of 64 bit word Third 16 bit word Base + 0 Second 16 bit word Least significant 16 bits of 64 bit word Page 11
