Download Alpha 21164 Microprocessor Hardware Reference Manual

parity
A method for checking the accuracy of data by calculating the sum of the
number of ones in a piece of binary data. Even parity requires the correct
sum to be an even number, odd parity requires the correct sum to be an odd
number.
PGA
Pin grid array.
pipeline
A CPU design technique whereby multiple instructions are simultaneously
overlapped in execution.
PLA
Programmable logic array.
PLCC
Plastic leadless chip carrier or plastic-leaded chip carrier.
PLD
Programmable logic device.
PLL
Phase-locked loop.
PMOS
P-type metal-oxide semiconductor.
PQFP
Plastic quad flat pack.
primary cache
The cache that is the fastest and closest to the processor. The first-level caches,
located on the CPU chip, composed of the Dcache, Icache, and Scache.
program counter
That portion of the CPU that contains the virtual address of the next
instruction to be executed. Most current CPUs implement the program counter
(PC) as a register. This register may be visible to the programmer through the
instruction set.
Glossary–14