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FIGURE 4-13 F I N E DATA PHASE DETECTOR INTEGRATOR OUTPUT
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5 VOLTS
RELATIVE PHASE I N RADIANS
FIGURE 4-14
F I N E DATA PHASE DETECTOR CHARACTERISTIC
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The o u t p u t o f t h e f i n e phase d e t e c t o r c a n be
a p p l i e d t o t h e i n p u t o f t h e f i n e PLL low p a s s f i l t e r
t h r o u g h U6 p i n s 1 , 2 , 1 3 and U3 p i n s 1 0 , 1 1 , 1 2 .
Opening t h i s s w i t c h e n a b l e s t h e p r o c e s s o r t o open t h e
loop and f r e e z e t h e d a t a c l o c k o s c i l l a t o r f r e q u e n c y a t
i t s present v a l u e , i n case of i n t e r f e r e n c e .
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E x t e r n a l O s c i l l a t o r I n p u t (Option)
A s an a l t e r n a t i v e , t h e output of t h e coarse phase
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d e t e c t o r , o r an e x t e r n a l input phase d e t e c t o r can be
s e l e c t e d a s t h e i n p u t t o t h e f i n e l o o p v i a U6 p i n s 1 0 ,
11, 1 2 , o r U3 p i n s 3 , 4 , 5 r e s p e c t i v e l y .
The c o a r s e
d e t e c t o r i s used t o r e - a c q u i r e d a t a lock a f t e r i t has
been l o s t . The e x t e r n a l i n p u t phase d e t e c t o r w i l l b e
s e l e c t e d during a "freeze" condition, but only i f an