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Download Fixed-Point Blockset User's Guide
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Unit Delay Resettable External IC Purpose 10Unit Delay Resettable External IC Library Delays & Holds Description The Unit Delay Resettable External IC block delays a signal one sample period. Delay a signal one sample period, with reset and external initial condition The block can reset its state based on an external reset signal R. The block has two input ports, one for the input signal u and the other for the reset signal R. When the reset signal is false, the block outputs the input signal delayed by one time step. When the reset signal is true, the block resets the current state to the initial condition given by the signal IC and outputs that state delayed by one time step. The input u and initial condition IC must be the same data type, but can be any data type. The output is the same data type as the inputs u and IC. The reset R can be any data type. You specify the time between samples with the Sample time parameter. A setting of -1 means the Sample time is inherited. Parameters and Dialog Box Sample Time Sample time. Characteristics Input Port u Any data type supported by the blockset Input Port R Any data type supported by the blockset Input Port IC Same as the input u Output Port Same as the input u 10-213
