Download Triple-Speed Ethernet MegaCore Function User Guide

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6-8
UG-01008
2015.06.15
Command_Config Register (Dword Offset 0x02)
Bit(s)
Name
R/W
Description
4
PROMIS_EN
RW
Promiscuous enable. Set this bit to 1 to enable promiscuous
mode. In this mode, the MAC function receives all frames
without address filtering.
5
PAD_EN
RW
Padding removal on receive. Set this bit to 1 to remove
padding from receive frames before the MAC function
forwards the frames to the user application. This bit has no
effect on transmit frames.
This bit is not available in the small MAC variation.
6
CRC_FWD
RW
CRC forwarding on receive.
• Set this bit to 1 to forward the CRC field to the user
application.
• Set this bit to 0 to remove the CRC field from receive
frames before the MAC function forwards the frame to
the user application.
• The MAC function ignores this bit when it receives a
padded frame and the PAD_EN bit is 1. In this case, the
MAC function checks the CRC field and removes the
checksum and padding from the frame before
forwarding the frame to the user application.
7
PAUSE_FWD
RW
Pause frame forwarding on receive.
• Set this bit to 1 to forward receive pause frames to the
user application.
• Set this bit to 0 to terminate and discard receive pause
frames.
8
PAUSE_IGNORE
RW
Pause frame processing on receive.
• Set this bit to 1 to ignore receive pause frames.
• Set this bit to 0 to process receive pause frames. The
MAC function suspends transmission for an amount of
time specified by the pause quanta.
9
TX_ADDR_INS
RW
MAC address on transmit.
• Set this bit to 1 to overwrite the source MAC address in
transmit frames received from the user application with
the MAC primary or supplementary address configured
in the registers. The TX_ADDR_SEL bit determines the
address selection.
• Set this bit to 0 to retain the source MAC address in
transmit frames received from the user application.
10
HD_ENA
RW
Half-duplex enable.
• Set this bit to 1 to enable half-duplex.
• Set this bit to 0 to enable full-duplex.
• The MAC function ignores this bit if you set the ETH_
SPEED bit to 1.
Altera Corporation
Configuration Register Space
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