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Download RLDRAM II Controller MegaCore Function v9.1 User Guide
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2. Functional Description Block Description Figure 2–1 shows the RLDRAM II Controller MegaCore function block diagram. Figure 2–1. RLDRAM II Controller Block Diagram Note (1) , (2) RLDRAM II Controller local_addr[] local_bank_addr[] local_dm[] local_read_req local_refresh_req local_wdata[] local_write_req rldramii_dq[] rldramii_q[] rldramii_qk[] rldramii_qvld[] Control Logic (Encrypted) local_init_done local_rdata[] local_rdata_valid[] local_wdata_req clk write_clk addr_cmd_clk non_dqs_ capture_clk (Note 3) reset_clk_n reset_addr_cmd_clk_n reset_read_clk_n[] capture_clk[] (Note 4) dqs_delay_ctrl[] (Note 4) Datapath rldramii_a_0[] rldramii_ba_0[] rldramii_clk[] rldramii_clk_n[] rldramii_cs_n_0 rldramii_d[] rldramii_dm[] rldramii_ref_n_0 rldramii_we_n_0 Notes to Figure 2–1: (1) (2) (3) (4) You can edit the rldramii_ prefix in IP Toolbench. The default signal is <signal>_0. When you specify additional address and command busses, both <signal>_0 and <signal>_1 are present. Non-DQS mode only. DQS mode only. Altera Corporation November 2009 MegaCore Version 9.1 2–1
