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Copyright
Copyright © 1991-2000 Exemplar Logic, Inc., A Mentor Graphics Company
All Rights Reserved
Trademarks
Exemplar Logic™ and its Logo are trademarks of Exemplar Logic, Inc.
LeonardoSpectrum™, LeonardoInsight™, FlowTabs™, HdlInventor™, SmartScripts™,
P&RIntegrator™, DesktopASIC™, XlibCreator™, SynthesisWizard™, and MODGEN™
are trademarks of Exemplar Logic, Inc.; Model Sim/VHDL™, Model Sim™, and
V-System/Verilog™ are trademarks of Model Technology, Inc.; Renoir™, Monet™,
and PackagedPower™ are trademarks of Mentor Graphics Corporation. Verilog® and
Verilog-XL® are registered trademarks of Cadence Design Systems, Inc.
All other trademarks remain the property of their respective owners.
Disclaimer
Although Exemplar Logic, Inc. has tested the software and reviewed the documentation,
Exemplar Logic makes no warranty or representation, either express or implied, with
respect to this software and documentation, its quality, performance, merchantability, or
fitness for a particular purpose.