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Chapter 14
Comparing Waveforms
Introduction
Waveform Compare computes timing differences between test signals and reference signals.
The general procedure for comparing waveforms has four main steps:
1. Select the simulations or datasets to compare
2. Specify the signals or regions to compare
3. Run the comparison
4. View the comparison results
In this exercise you will run and save a simulation, edit one of the source files, run the
simulation again, and finally compare the two runs.
Note
The functionality described in this tutorial requires a compare license feature in your
ModelSim license file. Please contact your Mentor Graphics sales representative if you
currently do not have such a feature.
Design Files for this Lesson
The sample design for this lesson consists of a finite state machine which controls a behavioral
memory. The test bench test_sm provides stimulus.
The ModelSim installation comes with Verilog and VHDL versions of this design. The files are
located in the following directories:
Verilog – <install_dir>/examples/tutorials/verilog/compare
VHDL – <install_dir>/examples/tutorials/vhdl/compare
This lesson uses the Verilog version in the examples. If you have a VHDL license, use the
VHDL version instead. When necessary, instructions distinguish between the Verilog and
VHDL versions of the design.
Related Reading
User’s Manual sections: Waveform Compare and Recording Simulation Results With Datasets.
ModelSim SE Tutorial, v10.1
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