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Download XC161-32 - Infineon
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XC161-32 Derivatives System Units (Vol. 1 of 2) Central Processing Unit (CPU) By reordering instructions, the bubble in the pipeline can be filled with an instruction not using this resource. Conflict_CSFR_Update_Resolved: MUL R0,R1 In In+1 MOV R3,[R0] In+2 MOV R6,MDL In+3 ADD R6,R1 In+4 ... Table 4-12 Pipeline Dependencies with Result CSFRs (No Stall) Tn+41) Stage Tn Tn+1 DECODE In = MUL R0, R1 In+1 = MOV In+2 = MOV In+3 = ADD In+4 R3, [R0] R6, MDL R6, R1 Tn+2 Tn+3 Tn+5 In+5 ADDRESS In-1 In = MUL R0, R1 In+1 = MOV In+2 = MOV In+3 = ADD In+4 R3, [R0] R6, MDL R6, R1 MEMORY In-2 In-1 In = MUL R0, R1 In+1 = MOV In+2 = MOV In+3 = ADD R3, [R0] R6, MDL R6, R1 EXECUTE In-3 In-2 In-1 In = MUL R0, R1 In+1 = MOV In+2 = MOV R3, [R0] R6, MDL WR.BACK In-4 In-3 In-2 In-1 In = MUL R0, R1 In+1 = MOV R3, [R0] 1) MDL can be read now, no stall cycle necessary. User’s Manual CPUSV2_X, V2.2 4-22 V1.0, 2004-02
