Download XC161-32 - Infineon

XC161-32 Derivatives
System Units (Vol. 1 of 2)
Debug System
functionality necessary to interact between the debug interface (the external debugger)
and the internal system.
The OCDS system provides the following basic features:
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Hardware, software and external pin breakpoints
Reaction on break with CPU-Halt, monitor call, data transfer and external signal
Read/write access to the whole address space
Single stepping
Debug Interface pins for JTAG interface and break interface
Injection of arbitrary instructions
Fast memory tracing through transfer to external bus
Analysis and status registers
11.2
Debug Interface
The Debug Interface is a channel to access XC161 On-Chip Debug Support (OCDS)
resources. Through it data can be transferred to/from all on- and off-chip (if any)
memories and control registers.
Features and Functions
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Independent interface for On-Chip Debug Support (OCDS)
JTAG port based on the IEEE 1149 JTAG standard
Break interface for external trigger and indication of breaks
Generic memory access functionality
Independent data transfer channel for e.g. programming of on-chip non volatile
memory
The Debug Interface is represented by:
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Standard JTAG Interface
Two additional XC161 specific signals - OCDS Break-Interface
User’s Manual
OCDS_X83, V2.1
11-2
V1.0, 2004-02