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How Precision Compiles Designs
How Precision Synthesizes the Design
How Retiming Works
A circuit with very critical timing will contain many non-critical paths that easily meet timing.
This excess time available for data propagation is called slack and will be unevenly distributed
with some circuit paths having negative slacks, and some having positive slacks. Retiming will
be carried out if the proper slack budget is obtained through the proprietary budgeting
algorithms. If the structure of the circuit is appropriate, it is possible to move a register forward
or backwards, effectively moving some of the delay through the register, without affecting the
functionality of the design at the primary output ports. Ideally, the result will be positive slack
on both sides of the register.
Supported Xilinx Technologies
Table 4-1. Technologies Supported by Register Retiming
Technologies Supported by Register Retiming
ALTERA
XILINX
APEX 20K, 20KC, 20KE
Virtex/Virtex-E
APEX II
Virtex II
Excalibur-Arm
Virtex-II Pro
Stratix/StratixGX
Spartan-II/Spartan-IIE
Cyclone
Spartan-III
Note: When retiming is enabled for a non-supported technology, a message will appear in the
Transcript Window indicating that Retiming has been turned off.
Precision Synthesis Installation Guide, 2003c Update1
March 2004
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