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MC2 Functions where BCK is the value programmed in the Bus Clock register, and BUS CLOCK is the MC68xx0x0 bus clock frequency. 3 EPROM Access Time Control Register The MVME1X2P4 is populated with a 150ns EPROM memory device. Due to the wide range of EPROM speeds, the contents can be changed by software to adjust for a specific speed. ADR/SIZ BIT $FFF42040 (8 bits) 23 22 21 NAME 20 19 ROM0 18 17 16 ET2 ET1 ET0 OPER R R R R/W R R/W R/W R/W RESET 0 0 0 1 PL 0 1 PL 1 PL 1 PL ET2-ET0 EPROM access time is controlled by the state of ET2ET0. The following table defines the ET2-ET0 encoding (note that for the MVME1X2P4, whose bus frequency is 1 /2 the processor frequency, only the 33MHz column applies). ET2ET0 EPROM Access <= N at 25MHz where N = EPROM Access <= N at 33MHz where N = $0 60 ns 40 ns $1 100 ns 70 ns $2 140 ns 100 ns $3 180 ns 130 ns $4 220 ns 160 ns $5 260 ns 190 ns $6 300 ns 210 ns $7 340 ns 240 ns ROM0 3-38 Refer to the table on the Local Bus Memory Map, Note 1, in Chapter 1. Computer Group Literature Center Web Site
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