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Chapter 12
DMA: Direct Memory Access
In this chapter we discuss the use of direct memory access (DMA) to
relieve the processor of the costs of transferring blocks of data between memory
and peripherals. Consider the following idiom where a block data is read from
a peripheral by repeatedly waiting for a status flag and then reading an item
from the peripheral.
for (i = 0; i < N; i++) {
while ( flagBusy );
buf[i] = peripheralRegister ;
}
We have seen this with serial communication (Section 5.1), SPI communication (Listing 6.3), and will see it again with I2C communication (Figure 9.3). This approach, called software polling, has three limitations. First,
the processor is tied up during the transfer and cannot perform other tasks;
ideally with a large data transfer (consider reading a data sector from an SD
card), the transfer could be kicked off and the processor freed to perform other
work while the transfer is realized. Second, the actual transfer rate is lower
than the underlying hardware might permit. Finally, it is difficult to achieve
tight timing bounds, for example, audio streaming depends upon the data
samples to be transferred at a constant rate.
To see rather dramatically the differences in performance, consider
the two Logic screen captures showing the SPI transfers when filling and
7735 LCD with a solid color shown in Figure 12. The upper capture measures the time for transferring 2 pixels, while the lower capture measures
the time for transferring 128 pixels. The theoretical peak is 12x106 /16 =
750, 000pixels/second for a 12 MHz SPI clock. Without DMA, our transRevision: 1396a85 (2013-01-07)
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