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5.5
VMEbus Release Functions
If the SYS68K/CPU-6 board has become bus master on the VMEbus, then
it must be able to release Bus Mastership under different
conditions.
There are three conditions for releasing bus
mastership.
A) Timeout Counter Condition
B) BCLR* Signal of the VMEbus
C) Release On Request
(RAT)
(RBCLR)
(ROR)
The influence of the conditions can be switched on and off via
jumpers.
5.5.1
Release On Request (ROR)
The ROR mode limits the effect of the RAT function. With the ROR
mode disabled, the Release After Timeout function terminates bus
mastership as soon as the timeout condition is entered. If the ROR
mode is enabled, then bus mastership will be released if the
timeout condition is entered and a Bus Request is pending. With
ROR enabled, very short timeout can be selected without losing bus
access efficiency.
Jumper B13
Pin 13-18
IN : ROR is enabled
OUT: ROR is disabled
Default condition is:
5.5.2
ROR is enabled
Release on Bus Clear (RBCLR)
The RBCLR function allows the release of the bus mastership if an
external arbiter drives the BCLR signal active.
5.5.3
Release After Time-Out (RAT)
A timer chip with a changeable clock rate is installed on the
SYS68K/CPU-6 to provide a release of bus mastership at latest after
timeout.
The maximum contiguous time available for the bus master state is
defined by jumper settings at the jumperfields B25, B31 or B32.
For the RAT times see Table 5.5-1. The location diagram of the RAT
jumperfields are outlined in Figure 5.5-1.
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