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Field Programmable Gate Array Registers
SCIEN
The SCI Enable Register (SCIEN) defines the type of events that can
generate an SCI. Refer to Table 5-18
Table 5-18. Bit Descriptions for the SCIEN Register
7 (most
significant
bit)
6
5
4
3
2
1
0 (least
significant
bit)
ENABLE
RES
RES
ENUM
ALARM_A
ALARM_B
TEMP
SMB
SMB (Bit 0)
❏
Set to a logic 1 to allow generation of an SCI when SMB ALERT is
active. SMB ALERT is active when logic 0.
❏
Write a logic 0 to this bit to disable an SCI for this event.
TEMP (Bit 1)
❏
Set to a logic 1 to allow generation of an SCI when TEMP is active.
TEMP is the ATF signal from the MMC2 and is active when logic 0.
❏
Write a logic 0 to this bit to disable an SCI for this event.
ALARM_A (Bit 3) and ALARM_B (Bit 2)
❏
Set to a logic 1 to allow the generation of an SCI when the
ALARM_A or ALARM_B go active. Alarm is active when logic 0.
❏
Write a logic 0 to these bits to disable an SCI for this event.
ENUM (Bit 4)
❏
Set to a logic 1 to allow generation of an SCI when the ENUM event
occurs.
❏
Write a logic 0 to this bit to disable an SCI for this event.
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