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3.7.3.1 Character Transmission
The SCI transmitter accommodates 8 bit data characters. The values of the WDS bits determines
the format of data transmission. In order to transmit the data the data is first written into the data
registers(STX/STXA). The data from the data registers is the transmitted into the transmit shift
register. The data in the shift register is then shifted out through the TXD pin, after appending with
a stop bit and preface with a start bit. The TDRE bit is set when the shift register is loaded with the
data to be transmitted, from the SCI data register. This indicates that SCI register is now ready to be
written with next data to be transmitted from the internal data bus. In order to prevent the gap
between the words, while writing to data registers, TDRE goes high halfway into the transmission
of bit 1 until the middle of bit 6. While initiating the transfer of message, to make the process easy,
TRNE flag is set to indicate that there is no data in either data register of shift register. If the
interrupt enable bit is also set, then TDRE generates an interrupt request.
3.7.3.2 Preamble and Break Characters
When the TE bit is toggled from 0 to 1, then transmit shift register is automatically loaded with a
preamble of 10 or 11 ones, depending on the status of WDS bits. After the preamble shifts out,
transmitter is ready to accept data from internal data bus. The hardware also generates parity bit and
is appended in the parity bit position while parity mode is selected. When the SBK bit is set, the
transmit shift register is loaded with 10 or 11zeros, based on the WDS bit's status. After the SBK bit
is cleared, before transmitting the original data from the shift register, one high bit is transmitted to
identify the start bit of the next frame.
3.7.4 Receiver
This section gives an independent idea of the functionality or the SCI receiver. The block diagram
below describes the design of the receiver part.
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