Download SAM9-L9260 User Manual

SAM9-L9260 development board
Users Manual
Rev. B, June 2008
Copyright(c) 2009, OLIMEX Ltd, All rights reserved
INTRODUCTION:
SAM9-L9260 is a low cost development platform with ARM9
microcontroller, 64MB SDRAM and 512MB NAND Flash. The board has
Ethernet 100Mbit controller, USB host, USB device, RS232 and 40 pin
extension port with all unused SAM9260 ports available for add-on boards.
SAM9-L9260 has waste amount of Flash and RAM and runs Linux,
WindowsCE and other RTOS natively. The on-board RTC clock is equipped
with a 3V Li backup battery.
BOARD FEATURES:
-
MCU: AT91SAM9260 16/32 bit ARM9™ 200MHz operation
50MHz system (main) clock
standard JTAG connector with ARM 2x10 pin layout for
programming/debugging with ARM-JTAG
64 MB SDRAM
512MB NAND Flash (seen in Linux as silicon drive)
Ethernet 100Mbit connector
USB host and USB device connectors
RS232 interface and drivers
SD/MMC card connector
one user button and one reset button
one power and two status LEDs
on board voltage regulator 3.3V with up to 800mA current
single power supply: 5V DC required
power supply filtering capacitor
18.432 Mhz crystal on socket
extension header
PCB: FR-4, 1.5 mm (0,062"), soldermask, silkscreen component print
Dimensions: 100 x 80 mm (3.94 x 3.15")
ELECTROSTATIC WARNING:
The SAM9-L9260 board is shipped in protective anti-static packaging. The
board must not be subject to high electrostatic potentials. General practice
for working with static sensitive devices should be applied when working
with this board.
BOARD USE REQUIREMENTS:
Cables:
1.8 meter USB A-B cable to connect with USB host.
Null modem RS232 female – female to connect with PC COM
port.
Hardware: ARM-JTAG, ARM-USB-OCD or other compatible tool if you
want to program this board with JTAG, usually with linux
installed you can develop without the need for JTAG.
Software:
The CD contains Linux 2.6 complete with source and binary in
CD.
BOARD LAYOUT:
SCHEMATIC:
R64
470K
C75
NA
100nF
R37
330
37
38
39
40
41
42
43
44
45
46
47
48
GND5
GND4
FXSD/FXEN
RX+
RXVDDRX
PD#
LED3/NWAYEN
LED2/DUPLEX
LED1/SPD100/NFEF
LED0/TEST
INT/PHYAD0
3.3V
BSS138
PA6
C71
10uF/6.3V
3.3V
U7
R42
1
2
3
4
5
6
7
8
9
10
11
12
PHY_PDE/PHY_PDCTRL
C67
100nF
2.2K
PA21_EMDIO
PA20_EMDC
PA26_ERX3
PA25_ERX2
PA15_ERX1
PA14_ERX0
PA17_ERXDV
PA27_ERXCK
PA18_ERXER
C63
100nF
L6
KS8721BL
C66
10uF/6.3V
+
C64
100nF
PA26_ERX3
PA25_ERX2
PA15_ERX1
PA14_ERX0
R56
R57
R58
R59
3.3k
3.3k
3.3k
3.3k
R39
4.7K
U8
PA24_TWCK
PA23_TWD
PA17_ERXDV
PA18_ERXER
PA28_ECRS
PA29_ECOL
6
7
R8
R9
R36
R54
R75
SCL
WP
1K
1K
1K
1K
3.3K
3.3V
2
3
2
1
A2
A1
A0
24LC256(NA)
SDA
GND
C91
+
100uF/6.3V/tant
+5V
+
C96
+
100uF/6.3V/tant
+
+
100nF
PC13_RDYBSY R5
0R
A22_NANDCLE
A21_NANDALE
19
16
17
18
SDCLK
38
SDCLKEN 37
DQML
DQMH
CS
WE
CAS
RAS
CLK
CKE
3.3V
40
NC1
1
14
27
3
9
43
49
VDD1
VDD2
VDD3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
28
41
54
6
12
46
52
VSS1
VSS2
VSS3
VSSQ1
VSSQ2
VSSQ3
VSSQ4
7 X 100nF
K4S561632C-TC/L75
1
14
27
3
9
43
49
C13
15
39
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
28
41
54
6
12
46
52
C14
A0
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
3.3V
C12
20
21
R2
470K
7 X 100nF
23
24
25
26
29
30
31
32
33
34
22
35
36
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
20
21
BA0
BA1
VDD1
VDD2
VDD3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
DQML
DQMH
VSS1
VSS2
VSS3
VSSQ1
VSSQ2
VSSQ3
VSSQ4
CLK
CKE
15
39
CS
WE
CAS
RAS
USB
1
2
3
4
SHIELD
USB_A
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
SDA10
A13
A14
A16
A17
A1
CFIOW_NBS3_NWR3
19
16
17
18
SDWEN
CASN
RASN
38
37
SDCLK
SDCLKEN
40
NC1
K4S561632C-TC/L75
SDCS
A[0..24]
D[0..31]
AD[0..1],PC[4..11],PC13_RDYBSY,PC14_NANDCS,PC15
AD[0..1],PC[4..11],PC13_RDYBSY,PC14_NANDCS,PC15
3.3V
3.3V
PC15
PB0
PB1
PB2
PB3
PB4
PB5
PB8
PB9
PB10
PB11
PB16
PB17
PB18
PB19
PB20
PB21
PB22
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6 PC14_NANDCS
8 PC13_RDYBSY
10
PC10
12
PC9
14
PC8
16
PC7
18
PC6
20
PC4
22
PB31
24
PB30
26
PB29_CTS1
28
PB28_RTS1
30
PB27
32
PB26
34
PB25
36
PB24
38
PB23
40
EXT
PC5
AEXT
+5V
AVDD
VREFP
AD1
AD0
6
5
4
3
2
AGND 1
R45 NA
3.3V
3
HEAD6
TXD1/DTXD
PB6_TXD1
PB28_RTS1
PB15_DTXD
PB29_CTS1
PB7_RXD1
PB14_DRXD
PB[0..11],PB[14..31]
3.3V
C51 1
100nF
RXD1/DRXD
C52 4
100nF
5
TXD1/DTXD
PB28_RTS1
11
10
12
RXD1/DRXD
560R 9
R1
U6
ST3232
C1+
C1C2+
V+
V-
2
6
C54
100nF
C53
100nF
T1IN
T2IN
R1OUT
R2OUT
1
2
3
4
5
RS232_0
C2T1OUT
T2OUT
R1IN
R2IN
14
7
TXD
RTS
13
8
RXD
CTS
PC5
USB
USB_H
U4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
3.3V
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
C11
A16
A17
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
C9
23
24
25
26
29
30
31
32
33
34
22
35
36
SDWEN
CASN
RASN
USB_B
D[0..31]
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
SDA10
A13
A14
CFIOR_NBS1_NWR1
RF1
MFR030
+5V
RNB
U1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
10nF
SHIELD
FB0805/120
100nF
33
33
R6
1K
K9XXG08UXM
C77
100nF
7
R/#B
1
2
3
4
C79
15pF
HDMA R61
HDPA R62
3.3V
VSS1
VSS2
USB_D
100nF C60
13
36
C16
R74 33
C82
C62
C15
VCC1
VCC2
15pF
R70 R71
22K 0R
R69
15K
FB
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
5
1N5819S(NA)
47pF C65
A14
A13
VCC
12
37
I/O_0
I/O_1
I/O_2
I/O_3
I/O_4
I/O_5
I/O_6
I/O_7
C81
D0
D1
D2
D3
D4
D5
D6
D7
29
30
31
32
41
42
43
44
47pF
A17
A16
C50
100nF
1
R7
470K
3.3V
R38
4.7K
A22_NANDCLE
A21_NANDALE
3.3V
#CE
#RE
#WE
#WP
CLE
ALE
PRE
15K
15K
3.3V
PB[0..11],PB[14..31]
3.3V
100nF
33pF(NA)
R65
R66
1
2
SDCS
145
D31
144
D30
143
D29
142
D28
141
D27
140
D26
139
D25
138
D24
137
D23
136
D22
135
D21
134
D20
131
D19
130
D18
129
D17
128
D16
127 PC15
PC14_NANDCS
59
PC13_RDYBSY
56
57
PC11
58
PC10
60
PC9
61
PC8
64
PC7
63
PC6
67
PC5
62
PC4
159
AD1
158
AD0
PC31/D31
PC30/D30
PC29/D29
PC28/D28
PC27/D27
PC26/D26
PC25/D25
PC24/D24
PC23/D23
PC22/D22/TCLK5
PC21/D21/EF100
PC20/D20/SPI1_NPCS3
PC19/D19/SPI1_NPCS2
PC18/D18/SPI1_NPCS1
PC17/D17/SPI0_NPCS3
PC16/D16/SPI0_NPCS2
PC15/NWAIT/IRQ1
PC14/NCS3/NANDCS/IRQ2
PC13/FIQ/NCS6
PC11/NCS2/SPI0_NPCS1
PC10/A25/CFRNW/CTS3
PC9/NCS5/CFCS1/TIOB0
PC8/NCS4/CFCS0/RTS3
PC7/TIOB1/CFCE2
PC6/TIOB2/CFCE1
PC5/A24/SPI1_NPCS1
PC4/A23/SPI1_NPCS2
PC1/AD1/PCK0
PC0/AD0/SCK3
9
8
18
19
16
17
38
NCE
NANDOE
NANDWE
R73 33
DDM
DDP
U3
C10
PB0/SPI1_MISO/TIOA3
PB1/SPI1_MOSI/TIOB3
PB2/SPI1_SPCK/TIOA4
PB3/SPI1_NPCS0/TIOA5
PB4/TXD0
PB5/RXD0
PB6/TXD1/TCLK1
PB7/RXD1/TCLK2
PB8/TXD2
PB9/RXD2
PB10/TXD3/ISI_D8
PB11/RXD3/ISI_D9
PB14/DRXD
PB15/DTXD
PB16/TK0/TCLK3
PB17/TF0/TCLK4
PB18/TD0/TIOB4
PB19/RD0/TIOB5
PB20/RK0/ISI_D0
PB21/RF0/ISI_D1
PB22/DSR0/ISI_D2
PB23/DCD0/ISI_D3
PB24/DTR0/ISI_D4
PB25/RI0/ISI_D5
PB26/RTS0/ISI_D6
PB27/CTS0/ISI_D7
PB28/RTS1/ISI_PCK
PB29/CTS1/ISI_VSYNC
PB30/PCK0/ISI_HSYNC
PB31/PCK1/ISI_MCK
+
1
2
1
2
9
10
11
12
15
16
17
18
19
20
161
162
21
22
23
26
27
28
163
164
165
166
167
168
171
172
175
176
177
178
PB[0..11],PB[14..31]
PHY_IRQ
PA10_ETX2,PA11_ETX3,PA12_ETX0,PA13_ETX1,PA16_ETXEN,PA19_ETXCK,PA22_ETXER,PA28_ECRS,PA29_ECOL
PB0
PB1
PB2
PB3
PB4
PB5
PB6_TXD1
PB7_RXD1
PB8
PB9
PB10
PB11
PB14_DRXD
PB15_DTXD
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28_RTS1
PB29_CTS1
PB30
PB31
R11
470K
CFIOW_NBS3_NWR3
CFIOR_NBS1_NWR1
AT91SAM9260
2.5V
PC10
1
2
3
R67
1K
C70
100nF
3.3V
MDIO
MDC
RXD3/PHYAD1
RXD2/PHYAD2
RXD1/PHYAD3
RXD0/PHYAD4
VDDIO1
GND1
RXDV/CRSDV/PCS_LPBK
RXC
RXER/ISO
GND2
24
23
22
21
20
19
18
17
16
15
14
13
R52
1K
STAT
green
PA9
R53
R50
R51
36
35
34
33
32
31
30
29
NA
28
330R 27
330R 26
25
3.3V
PWR_LED
yellow
T1
C69
20pF
+
C76
100nF
DF_E
20pF
Q4
25MHz
REXT
VDDRCV
GND6
TXTX+
VDDTX
GND7
GND8
XO
XI
VDDPLL
RST#
R41
1.5K/1%
PHY_IRQ
R63
330
C73
100nF
LAN_RST
R40
4.99K/1%
C72
3.3V
PC11
L5
ferrite bead
RJLBC-060TC1
3.3V
C74
10uF/6.3V +
2.5V
PA28_ECRS
PA29_ECOL
PA11_ETX3
PA10_ETX2
PA13_ETX1
PA12_ETX0
PA16_ETXEN
PA19_ETXCK
PA22_ETXER
1nF/2kV
3.3V
0R
VDDIO2
GND3
CRS/RMII_BTB
COL/RMII
TXD3
TXD2
TXD1
TXD0
TXEN
TXC/REFCLK
TXER
VDDC
1:1
75
3.3V
LED100/DUP
75
R33 470K
C68
LEDACT
YELLOW
NRST
4
NANDF_E
68 SDCLK
C8
/CS/
/WP/
3
R91
100nF
100nF
100nF
100nF
100nF
100nF
100nF
/RESET/
PA2_SPCK
C99
1uF
R72
1.5K(NA)
C80
3.3V
PC14_NANDCS
NA
R85
C7
VCC
2
C93
HDPA,HDMA,DDP,DDM
C6
SCK
PA1_MCCDB
10uF/16V
D3
A22_NANDCLE
A21_NANDALE
126
125
124
123
122
121
120
119
118
112
111
110
109
108
107
106
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
R79
330R/1%
C90
3.3V
3.3V_E
2
1
3.3V
C4
GND
1
PA0/SPI0_MISO/MCDB0
PA1/SPI0_MOSI/MCCDB
PA2/SPI0_SPCK
PA3/SPI0_NPCS0/MCDB3
PA4/RTS2/MCDB2
PA5/CTS2/MCDB1
PA6/MCDA0
PA7/MCCDA
PA8/MCCK
PA9/MCDA1
PA10/MCDA2/ETX2
PA11/MCDA3/ETX3
PA12/ETX0
PA13/ETX1
PA14/ERX0
PA15/ERX1
PA16/ETXEN
PA17/ERXDV
PA18/ERXER
PA19/ETXCK
PA20/EMDC
PA21/EMDIO
PA22/ADTRG/ETXER
PA23/TWD/ETX2
PA24/TWCK/ETX3
PA25/TCLK0/ERX2
PA26/TIOA0/ERX3
PA27/TIOA1/ERXCK
PA28/TIOA2/ECRS
PA29/SCK1/ECOL
R80
100R/1%
R81
330R/1%
C5
5
SI
SO
179
180
181
182
183
184
185
186
189
190
191
192
193
194
195
196
197
198
201
202
205
206
207
208
1
2
3
4
7
8
VO
GND/ADJ
10uF/16V
100nF
33K
33K
2
R48
R60
R49
R44
R43
49.9R/1%
NA
49.9R/1%
49.9R/1%
49.9R/1%
RJ45 SIDE
3
7
8
6
GREEN
1
3
2
AG
KG
AY
KY
7
6
8
+
PA0_MCDB0
R55
TD+
COM
TDAG
KG
AY
KY
RD+
NC
RD-
47uF/6.3V
WP_SFLASH_E AT45DB161D-SU
WRITE PROTECTED (NORMALLY OPEN)
2.5V
1:1
R35
100
C49
PA0_MCDB0
PA1_MCCDB
PA2_SPCK
PA3_MCDB3
PA4_MCDB2
PA5_MCDB1
PA6
PHY_IRQ
PA8_MCCK
PA9
PA10_ETX2
PA11_ETX3
PA12_ETX0
PA13_ETX1
PA14_ERX0
PA15_ERX1
PA16_ETXEN
PA17_ERXDV
PA18_ERXER
PA19_ETXCK
PA20_EMDC
PA21_EMDIO
PA22_ETXER
PA23_TWD
PA24_TWCK
PA25_ERX2
PA26_ERX3
PA27_ERXCK
PA28_ECRS
PA29_ECOL
1uF
D1
BAT54C
C89
R47
R46
R30
1K
U5
8
75
+
PC8
2
NRST
3.3V
NC
100uF/6.3V/tant
C3
NRST
152
HDMA
HDPA
NANDWE
NANDOE
C100
C2
R32
1K
1
2
1
50
51
10nF
2
VI
AGND
DDP
DDM
73
74
75
76
79
80
81
82
83
84
85
86
87
88
89
92
93
94
95
96
97
98
99
A22/NANDCLE
A21/NANDALE
A20
A19
A18
A17/BA1
A16/BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1/NWR2/NBS2
A0/NBS0
C44 100nF
SDA10
CASN
RASN
SDWEN
SDCLKEN
C97
AGND
VREFP
AVDD
1
2
3
CPE
6
75
WAKE_UP
PA0_MCDB0
PA5_MCDB1
PA4_MCDB2
13
15
BMS_LOW
NRST
TST
BMS
PC4
2
PA8_MCCK
1
1
4
5
2
3.3V
PA3_MCDB3
PA1_MCCDB
7
LAN
L1
470nH
36
42
1K
100K 40
NTRST
TCK
TDI
TDO
TMS
JTAGSEL
RTCK
TVS
1,5KE6,8CA
1
2
3
R31
33K
NRST
R20
R21
SHDN
WKUP
3
GND
0R
C101
VR1(3.3V)
RC1587NO_CUT
FB1206
+5VDC_only
55
54
100
104
105
116
117
115
72
71
69
101
102
70
103
68
SDA10
CAS
RAS
SDWE
SDCKE
SDCK
NANDWE
NANDOE
NRD/CFOE
NWR3/NBS3/CFIOW
NWR1/NBS1/CFIOR
NWR0/NWE/CFWE
NCS1/SDCS
NCS0
MFR110
R19
1nF
C94
L7
RF2
C1
R68
33K
WPE
NA
SW-TAKT6x3.8
10nF
HDMA
HDPA
XIN32
XOUT32
OSCSEL
PLLRCA
PWR_JACK
C98
R83
100R/1%
2
R86
10K
1
330
C58
RST
C48
1nF
ferrite bead
R23
C47
PLLRCA
TDI,TMS,TCK,RTCK,TDO,JTAGSEL,NTRST,NRST
SD-CARD
4.7K
1K
NTRST 35
34
TCK
30
TDI
29
TDO
31
TMS
JTAGSEL 43
37
RTCK
DDP
DDM
10uF/16V
100nF
100nF
100nF
100nF
100nF
100nF
100nF
R12
32768kHz/6pF
OSCSEL
C20
PLLRCA
C19
15pF
15pF
49
48
R22
1
2
3
4
5
6
7
8
9
CP1
CP2
10pF
46
45
41
154
Q2
157
ADVREFP
R82
220R/1%
R84
560R
47(NA)
33K
33K
3.3V
10pF
R17
1.6M
0R
R13
VDDPLLB(VDDOSC)
XIN
XOUT
GNDPLLB(GNDOSC)
RASN
R10
R34
SW-TAKT6x3.8
C17
148
149
150
151
OUT
C92
100nF
1
R87
33K
39
78
146
173
204
44
156
153
GNDCORE1
GNDCORE2
GNDCORE3
GNDCORE4
GNDCORE5
GNDBU
GNDANA
GNDPLLA
C95
PWR_5V
CASN
47(NA)
R77
1.8V
VR2(1.8V)
LM1117
ADJ/GND
WP_NFLASH_E
R88
33K
VDDCORE1
VDDCORE2
VDDCORE3
VDDCORE4
VDDCORE5
VDDBU
VDDANA
VDDPLLA
8
R89
33K
10
14
CD/DAT3/CS
CMD/DI
VSS1
VDD
CLK/SCLK
VSS2
DAT0/DO
DAT1/RES
DAT2/RES
C18
C43 C46 100nF
100nF
3.3V
SD/M M C
WP1
WP2
470nH
PA[0..29],PA1_MCCDB,PA2_SPCK,PA0_MCDB0,PA5_MCDB1,PA4_MCDB2,PA3_MCDB3,PA23_TWD,PA24_TWCK,PHY_IRQ
PA10_ETX2,PA11_ETX3,PA12_ETX0,PA13_ETX1,PA16_ETXEN,PA19_ETXCK,PA22_ETXER,PA28_ECRS,PA29_ECOL
PA14_ERX0,PA17_ERXDV,PA18_ERXER,PA27_ERXCK
PA15_ERX1,PA20_EMDC,PA21_EMDIO,PA25_ERX2,PA26_ERX3
PB[0..11],PB[14..31]
R90
33K
NA
VDDBU
AVDD
C45 100nF
3.3V
PC15
330
C59
BUT
2
BDS_E
TDO
NRST
38
77
147
174
203
47
160
155
3
TCK-RTCK
ICE_NRST R29
0R
VDDCORE
1
2
100nF
A2_L/A2_H
1
1
INTRC/EXTCLK
NTRST_E
ICE_NTRST 2
1 NTRST
TDI
TMS
TCK
R28
0R
RTCK
R16
100K
100nF
AVDD
C41
10uF/6.3V
100nF
AGND
R18
0R
Q1 18.432MHz
1.8V
100nF
C33 100nF
C34 100nF
C35 100nF
C36 100nF
C37 100nF
C42
2
1
R4
1
3
5
7
9
11
13
15
17
19
VDDBU
OSCSEL
3
2
1
+
4.7K
C39
100nF
R24
R27
R25
R26
JTAG
R3
GND
C40
1
10uF/6.3V
+ +
R15
NA
VDDBU
L2
3
VOUT
3.3V
2
4
6
8
10
12
14
16
18
20
3.3V
VIN
C38
100nF
100K
100K
100K
100K
3.3V
2
-
BAT
Li_bat_holder
3.3V
1
2
3
1K
R14
BAT/EXT
1.8V
VR3(1.8V)
MCP1700T-1802E/MB
5 X 100nF
PB9
PA23_TWD
PB1
PB3
JTAGSEL
PB8
PA24_TWCK
PB0
PB2
2
4
6
8
10
100nF
68
R76
66
91
113
133
6
14
25
33
53
188
200
170
GNDIOM1
GNDIOM2
GNDIOM3
GNDIOM4
GNDIOP0-1
GNDIOP0-2
GNDIOP0-3
GNDIOP0-4
GNDIOP0-5
GNDIOP0-6
GNDIOP0-7
GNDIOP1
4
UEXT
1
3
5
7
9
100nF
VDDIOM1
VDDIOM2
VDDIOM3
VDDIOM4
VDDIOP0-1
VDDIOP0-2
VDDIOP0-3
VDDIOP0-4
VDDIOP0-5
VDDIOP0-6
VDDIOP0-7
VDDIOP1
EEPROM
Array
3.3V
65
90
114
132
5
13
24
32
52
187
199
169
100nF
IN
SDCLK
A[0..24]
12 X 100nF
http://www.olimex.com/dev
U2
A[0..24]
COPYRIGHT(C) 2008, Olimex Ltd
VDDIO
PB[0..11],PB[14..31]
Rev. B
+5V
SDCLK
C61
5.1pF
R78
D[0..31]
C57
10uF/6.3V
C56 +
10uF/6.3V
C55 +
10uF/6.3V
C21 100nF
C22
C23 100nF
C24
C25 100nF
C26
C27 100nF
C28
C29 100nF
C30
C31 100nF
C32
SAM9-L9260
1.8V
3.3V_MCU_E
1.8V_MCU_E
3.3V
+
6
7
8
9
PROCESSOR FEATURES:
SAM9-L9260 board uses CPU AT91SAM9260 from Atmel® with the
following features:
- Incorporates the ARM926EJ-S™ ARM® Thumb® Processor
o DSP Instruction Extensions, ARM Jazelle® Technology for Java®
Acceleration
- External Bus Interface (EBI)
o Supports SDRAM, Static Memory, ECC-enabled NAND Flash and
CompactFlash®
- USB 2.0 Full Speed (12 Mbits per second) Device Port
o On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
- USB 2.0 Full Speed (12 Mbits per second) Host
- Ethernet MAC 10/100 Base T
o Media Independent Interface or Reduced Media Independent
Interface
o 28-byte FIFOs and Dedicated DMA Channels for Receive and
Transmit
- Bus Matrix
o Six 32-bit-layer Matrix
o Boot Mode Select Option, Remap Command
- Fully-featured System Controller, including
o Reset Controller, Shutdown Controller
o Four 32-bit Battery Backup Registers for a Total of 16 Bytes
o Clock Generator and Power Management Controller
o Advanced Interrupt Controller and Debug Unit
o Periodic Interval Timer, Watchdog Timer and Real-time Timer
- Reset Controller (RSTC)
o Based on a Power-on Reset Cell, Reset Source Identification and
Reset Output Control
- Clock Generator (CKGR)
o Selectable 32,768 Hz Low-power Oscillator or Internal Low
Power RC Oscillator on Battery Backup Power Supply, Providing
a Permanent Slow Clock
o 3 to 20 MHz On-chip Oscillator, One up to 240 MHz PLL and
One up to 130 MHz PLL
- Power Management Controller (PMC)
o Very Slow Clock Operating Mode, Software Programmable Power
Optimization Capabilities
o Two Programmable External Clock Signals
- Advanced Interrupt Controller (AIC)
o Individually Maskable, Eight-level Priority, Vectored Interrupt
Sources
o Three External Interrupt Sources and One Fast Interrupt
Source, Spurious Interrupt Protected
- Debug Unit (DBGU)
o 2-wire UART and Support for Debug Communication Channel,
Programmable ICE Access Prevention
- Periodic Interval Timer (PIT)
o 20-bit Interval Timer plus 12-bit Interval Counter
- Watchdog Timer (WDT)
o Key-protected, Programmable Only Once, Windowed 16-bit
Counter Running at Slow Clock
- Real-time Timer (RTT)
o 32-bit Free-running Backup Counter Running at Slow Clock
with 16-bit Prescaler
-
-
-
-
-
-
-
-
One 4-channel 10-bit Analog-to-Digital Converter
Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC)
o 96 Programmable I/O Lines Multiplexed with up to Two
Peripheral I/Os
o Input Change Interrupt Capability on Each I/O Line
o Individually Programmable Open-drain, Pull-up Resistor and
Synchronous Output
o – High-current Drive I/O Lines, Up to 16 mA Each
Peripheral DMA Controller Channels (PDC)
One Two-slot MultiMedia Card Interface (MCI)
o SDCard/SDIO and MultiMediaCard™ Compliant
o Automatic Protocol Control and Fast Automatic Data Transfers
with PDC
One Synchronous Serial Controller (SSC)
o Independent Clock and Frame Sync Signals for Each Receiver
and Transmitter
o I²S Analog Interface Support, Time Division Multiplex Support
o High-speed Continuous Data Stream Capabilities with 32-bit
Data Transfer
Four Universal Synchronous/Asynchronous Receiver Transmitters
(USART)
o Individual Baud Rate Generator, IrDA® Infrared
Modulation/Demodulation, Manchester Encoding/Decoding
o Support for ISO7816 T0/T1 Smart Card, Hardware
Handshaking, RS485 Support
o Full Modem Signal Control on USART0
Two 2-wire UARTs
Two Master/Slave Serial Peripheral Interfaces (SPI)
o 8- to 16-bit Programmable Data Length, Four External
Peripheral Chip Selects
o Synchronous Communications
Two Three-channel 16-bit Timer/Counters (TC)
o Three External Clock Inputs, Two Multi-purpose I/O Pins per
Channel
o Double PWM Generation, Capture/Waveform Mode, Up/Down
Capability
o High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2
One Two-wire Interface (TWI)
o Master, Multi-master and Slave Mode Operation
o General Call Supported in Slave Mode
IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
o 1.65V to 1.95V for VDDBU, VDDCORE and VDDPLL
o 1.65V to 3.6V for VDDIOP1 (Peripheral I/Os)
o 3.0V to 3.6V for VDDIOP0 and VDDANA (Analog-to-digital
Converter)
o Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM
(Memory I/Os)
AT91SAM9260 Block Diagram
MEMORY MAP:
POWER SUPPLY CIRCUIT:
The power supply for SAM9-L9260 must be regulated +5VDC. Please apply
exactly 5V as the same power line goes to USB hosts and if you apply over 5V
you will damage your USB devices attached to the host.
The current consumption is typical 250mA with 180 MHz clock of SAM9260
and 90MHz clock of external bus.
For the RTC there is a battery backup power supply from a small 3V Li
battery type CR2032.
RESET CIRCUIT:
SAM9-L9260 reset circuit is made with a 4.7k pull-up resistor and a RST
button connected to GND.
CLOCK CIRCUIT:
Quartz crystal Q1-18.432Mhz is connected to SAM9-L9260 Xin and Xout
pins.
Quartz crystal Q2-32768Hz is connected to SAM9-L9260 Xin32 and Xout32
pins.
JUMPER DESCRIPTION:
SMD jumper description
3.3V_E
Enable the main 3.3V regulator VR1(3.3V)-RC1587
Default state - closed
3.3V_MCU_E Enable 3.3V to the SAM9260 microcontroler.
Default state - closed
1.8V_MCU_E Enable 1.8V to the SAM9260 microcontroler.
Default state - closed
BDS_E
BounDary Scan Enable. The BDS_E jumper is used to select
the JTAG boundary scan when JTAGSEL pin asserted at a
high level (tied to VDDBU). This pin integrates a permanent
pull-down resistor of about 15KΩ to GNDBU. When BDS_E is
open JTAG function is selected.
Default state – open
TCK-RTCK Connects RTCK and TCK pins of SAM9260.
Default state open
WPE
Connects PC4(pin62) to Write Protection pin of SD/MMC
socket. If WP function is not used, WPE jumper has to be open
and PC4 is available of EXT connector pin 20.
Default state - closed
CPE
Connects PC8(pin61) to Card Present pin of SD/MMC socket.
If CP function is not used, CPE jumper has to be open and
PC8 is available of EXT connector pin 14.
Default state - closed
NTRST_E
When the NTRST_E jumper is closed – connects NTRST(pin 35)
to JTAG connector (pin3).
Default state - closed
WP_SFLASH_E
When the WriteProtect_SerialFLASH_Enable jumper is
closed it allows to protect the boot code written to
U5(AT45DB161D-SU) flash memory.
Default state open
WP_NFLASH_E
When the WriteProtect_NandFLASH_Enable jumper is
closed user can't write in the NAND flash.
Default state open
A2_L/A2_H Connects Address2(A2)pin of U8-24LC256 memory (default not
mounted) to logical 0 or logical 1, i.e. A2_L/A2_H define the
memory address of I2C bus.
Default state - open
PTH jumper description:
BMS_LOW
Boot Mode Sellect _ LOW jumper select the boot memory
External memory or embedded ROM. When BMS_LOW is
closed – BMS pin is logical 0, otherwise – logical 1.
Default state - open
BAT/EXT
BMS_LOW
The BATerry/EXTernal jumper defines the power source which
supplies the backup logic from VDDBU - pin 47.
BAT position – 3V Li battery type CR2032 plugged in BAT
holder
supplies
VDDBU
through
backup
VR3(1.8V)
MCP1700T-1802E/MB voltage regulator.
EXT position – The VDDBU is powered from main 1.8V voltage
regulator VR2(1.8V) – LM1117.
Default state
BAT/EXT
INTRC/EXTCLK
The INTRC/EXTCLK jumper defines the SAM9260 slow clock
source.
INTRC position – internal RC slow clock oscilator is selected
EXTCLK position – external 32768 crystal is used for
SAM9260 slow clock.
Default state
INTRC/EXTCLK
RXD1/DRXD
The RXD1/DRXD jumper defines which pin - RXD1 or DRXD is connected to the RS232 driver (ST3232), i.e. the board
allows comunication with PC COM port through RXD1 or
DRXD.
RXD1 position – RXD1 function of SAM9260 pin 18 is tied to
pin12(R1OUT) of U6(ST3232).
DRXD position – DRXD function of SAM9260 pin 21 is tied to
pin12(R1OUT) of U6(ST3232).
Default state
RXD1/DRXD
TXD1/DTXD
The TXD1/DTXD jumper defines which pin - TXD1 or DTXD is connected to RS232 driver (ST3232), i.e. the board allows
comunication with PC COM port through TXD1 or DTXD.
TXD1 position – TXD1 function of SAM9260 pin 17 is tied to
pin11(T1IN) of U6(ST3232).
DTXD position – DTXD function of SAM9260 pin 22 is tied to
pin11(T1IN) of U6(ST3232).
Default state
TXD1/DTXD
PHY_PDE/PHY_PDCTRL
PHY_PDE position – The PHY chip U7(KS8721BL) enter to
power down mode.
PHY_PDCTRL position – The PHY chip power down mode is
controled from SAM9260 PC1(pin58).
OPEN position – The PHY chip is alwаys enabled.
Default state- open
NANDF_E
The NANDFlash_Enable allows PC14/NAND_CS pin of
SAM9260 to control CE pin of NAND FLASH memory
U3(K9F4G08UXM). If the board has to boot from NAND flash
the NANDF_E jumper must be closed.
Default state- close
DF_E
PHY_PDE/PHY_PDCTRL
NANDF_E
The DataFlash_Enable allows PC11/SPI0_NPCS1 pin of
SAM9260 to control CS pin of serial Data Flash memory
U5(AT45DB161D-SU). If the board has to boot from Data Flash
the DF_E jumper must be closed.
Default state- close
DF_E
INPUT/OUTPUT:
RS232_0 is used as terminal in Linux, so you can connect to PC
hyperterminal for instance and work at command prompt.
The cable between SAM9-L9260 and PC must be female – female, null
modem type. Terminal settings are 115200 , 8bits, 1stop, no parity, no flow
control.
User button with name BUT – connected to SAM9260 pin127 PC15(IRQ1);
Status green LED with name STAT (SAM9260 pin185 PA6). The default
Linux installation ties it to NAND activity and lights it up whenever NAND is
accessed.
Power supply yellow LED with name PWR_LED indicates the state of
SAM9260. The default Linux installation links it to the CPU load and is
blinking it with a distinctive heartbeat pattern.
The LED PWR_5V (red) indicates +5V present on the board when it's on.
EXTERNAL CONNECTOR DESCRIPTION:
JTAG:
The JTAG connector allows a software debugger to talk via a JTAG (Joint
Test Action Group) port directly to the core. Instructions may be inserted and
executed by the core thus allowing SAM9260 memory to be programmed
with code and executed step by step by the host software.
For more details refer to IEEE Standard 1149.1 - 1990 Standard Test Access
Port and Boundary Scan Architecture and SAM9260 datasheets and users
manual.
Pin #
Signal Name
Pin #
Signal Name
1
VCC
2
VCC
3
ICE_NTRST
4
GND
5
TDI
6
GND
7
TMS
8
GND
9
TCK
10
GND
11
RTCK
12
GND
13
TDO
14
GND
15
ICE_NRST
16
GND
17
NC
18
GND
19
NC
20
GND
UEXT
Pin #
Signal Name
1
VCC
2
GND
3
PB8
4
PB9
5
PA24_TWCK
6
PA23_TWD
7
PB0(SPI1_MISO)
8
PB1(SPI1_MOSI)
9
PB2(SPI1_SPCK)
10
PB3(SPI1_NPCS0)
USB_D:
Pin #
Signal Name
1
+5V
2
USBDM
3
USBDP
4
GND
USB_A:
Pin #
Signal Name
1
+5V
2
HDMA
3
HDPA
4
GND
LAN:
Pin #
Signal Name
1
TD+
2
TD-
3
RD+
4
GND_LAN
5
GND_LAN
6
RD-
7
GND_LAN
8
GND_LAN
LED
Color
Usage
Right
Yellow
Activity
Left
Green
100MBits/s (Half/Full duplex)
EXT:
SAM9-L9260 has an ext_connector with 40 pins
Pin #
Signal Name
Pin #
Signal Name
1
3.3V
2
3.3V
3
PC15
4
+5V
5
PB0
6
PC14_NANDCS
7
PB1
8
PC13_RDYBSY
9
PB2
10
PC10
11
PB3
12
PC9
13
PB4
14
PC8
15
PB5
16
PC7
17
PB8
18
PC6
19
PB9
20
PC4
21
PB10
22
PB31
23
PB11
24
PB30
25
PB16
26
PB29_CTS1
27
PB17
28
PB28_RST1
29
PB18
30
PB27
31
PB19
32
PB26
33
PB20
34
PB25
35
PB21
36
PB24
37
PB22
38
PB23
39
GND
40
GND
RS232:
Pin #
Signal Name
1
NC
2
RXD
3
TXD
4
6
5
GND
6
4
7
RTS
8
CTS
9
NC
MECHANICAL DIMENSIONS:
SOFTWARE development:
Overview
The board comes with Linux preloaded in the NAND and DATAFLASH flash
memories. It's based on a custom-built kernel and a Debian 5.0 userland. To use it, connect a
null-modem cable to the board and to a serial port on your computer, start a terminal program
(e.g. HyperTerminal on Windows, minicom on Unix systems) and configure it to use a
115200 baud rate, 8 data bist, 1 stop bit and no parity and no flow control. Then apply power
to the board (use a 5VDC regulated power supply with at least 500mA output current) and
you should see the board start-up messages. The default root password is 'olimex'.
Restoring the default bootloader and kernel
If for some reason you need to restore the default factory configuration of the board,
the procedure is as follows:
First install the ATMEL AT91-ISP v1.12 package which comes on the disk. Reboot
the computer if needed.
Remove the NANDF_E and DF_E jumpers on the SAM9-L9260 board and power it
up. Connect an USB cable to the USB_D connector on the board and wait for the board to be
detected (the driver should already be installed by the AT91-ISP v1.12 package, so let
Windows search for it).
Close the NANDF_E and DF_E jumpers and run the
at91sam9260_demo_linux_dataflash.bat file from the sam9-l9260-samba directory. After a
while the log file will be displayed and the system should be restored to the default state.
WARNING! This procedure erases the whole NAND flash and the root filesystem will also
be destroyed and reset to its factory defaults in the process.
After a successful script execution the bootloaders and the Linux uImage will be
placed in DATAFLASH and the root filesystem will be placed in NANDFLASH. The reason
to boot from DATAFLASH is an AT91SAM9260 chip errata issue.
Alternative on-board root filesystem restore procedure
Boot-up the board with an alternate root filesystem (e.g. a USB flash drive, NFS
exported filesystem...) and use the following command (assuming that the rootjffs2.img file is
available in.)
sam9-l9260:~# flash_eraseall -j /dev/mtd1
sam9-l9260:~# nandwrite -a /dev/mtd1 /rootjffs2.img
You may get some errors about bad blocks not being erased - this is normal and is related to
the priciple of operation of NAND flashes. After the process is completed, reboot the board.
Running with another root filesystem
You may choose to use another media for the root filesystem for various reasons more capacity, faster access, etc. A complete root tree is archived in the sources/sam9-l9260rootfs.tar.bz2 file. It can be extracted to an empty ext3 partition on an USB drive or to some
NFS exported directory. Then you need to tell the kernel where to find the root - this is
accomplished by interrupting the u-boot process at the "Hit any key to stop autoboot:..."
prompt and setting the bootargs variable. For example, to boot from a USB flash drive, the
command is:
U-Boot> setenv bootargs mem=64M console=ttyS0,115200 root=/dev/sda1 rootdelay=10
and for booting from an NFS server at adress 192.168.0.75:
U-Boot> setenv bootargs mem=64M console=ttyS0,115200 root=/dev/nfs
nfsroot=192.168.0.75:nfsroot,proto=tcp ip=192.168.0.222:192.168.0.75
Toolchain
The sources for the bootloaders and the Linux kernel must be compiled under Linux
PC host. We don't intend to support Cygwin.
The projects were compiled using Codesourcery G++ lite 2009q1, freely available
from http://www.codesourcery.com. A convenience tarball is provided that contains the
Codesourcery binaries along with some useful shell scripts. This tarball must be extracted in
user's home directory. Example:
cd $HOME
tar xjf codesourcery-toolchain-2009q1-repack.tar.bz2
The latter will create a directory
$HOME/bin/codesourcery-armgcc-2009q1
Along with some shell scripts that must be sourced before compilation:
$HOME/bin/linux_cross_compile.sourceme
$HOME/bin/bootloader_cross_compile.sourceme
The latter shell scripts would add the cross compiler binaries to the PATH environment
variable and will set the ARCH and CROSS_COMPILE variables to arm and arm-nonelinux-gnueabi-/arm-none-eabi- respectively.
Building a custom kernel
The recommended build method is to use a cross-compiler. Building natively should
also work but would be very time-consuming. At the moment of this writing, the current
kernel version is 2.6.31-rc3, for which a pre-patched tarball is provided. After extracting the
sources in a temporary directory you can build the default kernel by typing
$ source $HOME/bin/linux_cross_compile.sourceme
$ make sam9_l9260_defconfig
$ make uImage
After the compilation, the kernel should be available at arch/arm/boot/uImage. If the
build process fails to detect the mkimage program then you need to get it and put it in your
PATH. The easiest way is to compile U-Boot and fetch it from the u-boot/tools subdirectory.
The new kernel can be transferred to the board by various means - e.g. use the board
restoration process and change the kernel in there, tftpboot-ing the board, etc.
Convenience GIT patches for the kernel are also provided in a separate tarball.
Building the bootstrap binary
Extract the sources from source/at91bootstrap-2.4-olimex.tar.bz2 to your working
directory and issue the following commands:
$ source $HOME/bin/bootloader_cross_compile.sourceme
$ make sam9_l9260_defconfig
If everything is correct, the resulting binary file will be located in the /binaries
directory.
Building U-Boot
Extract the sources from source/u-boot-olimex-git20090716.tar.bz2 and issue:
$ source $HOME/bin/bootloader_cross_compile.sourceme
$ make sam9l9260_config
$ make
Cross-compiling a simple "hello world" example
Extract one of the provided cross-compilers on your host system and add it to the
PATH variable. Use the cross-compiler to build the example, then transfer it to the board by
e.g. USB flash drive, http download etc.
Example commands:
----- On the host system ----$ source $HOME/bin/linux_cross_compile.sourceme
$ cat > hello.c
#include <stdio.h>
int main(void)
{
unsigned int i;
printf("\r\nProba proba ");
for (i=0; i<10; i++)
printf("\r\n%d", i);
return 0;
}
^D
$ arm-none-linux-gnueabi-gcc -o hello hello.c
$ cp hello ~/htdocs/
----- On the board ----~ # wget http://192.168.0.xx/hello
~ # chmod 777 hello
~ # ./hello
Proba proba
0
1
....
Using JTAG to program the board
A sample project is provided in the “TEST_BUTT” directory that demonstrates how
to write a project that runs directly on the core, without the need of an operating system. It
was developed using IAR Embedded Workbench for ARM ver. 4.42A with a Segger J-Link
JTAG adapter
Common Questions
Q: When booting from the internal NAND flash the board seems to hang at "INIT: version
2.86 booting" and/or "Activating swap...done" lines
A: When mounting the JFFS2 root filesystem, the system performs a consystency check
(similar to fsck). This almost blocks all access to the nand flash and the system appears to
hang. Please wait - on a first boot of a new filesystem this could take up to 5 minutes and is
considered normal.
Q: There are messages "Buffer I/O error on device mtdblock0, logical block 0;end_request:
I/O error, dev mtdblock0, sector 0" during boot-up. Is there a problem on the board?
A: These messages indicate incorrect OOB records in the part of the flash where the
bootloader is stored and are due to the version of SAM-BA which is used to write the various
parts of the bootloader. For all pracical reasons the above messages are harmless.
Q: The I/O operations are slow when using the on-board nand flash or USB flash drive.
A: When doing a sequential read/write (e.g. one single large file) flash memories can be fast.
When reading/writing many small files the performance will be really low.
Q: How to boot from the on board DataFlash?
A: Make sure that NANDF_E jumper is not connected and DF_E jumer is connected. If the
dataflash has been correctly programmed, the board should start up.
Q: Is the SD/MMC card supported?
A: The SD/MMC card is fully supported, including detection of card insertion/removal and
write lock
Q: What do the two LED's indicate?
A: These two leds are driven by default by the linux LED driver. The STAT LED is switched
on NAND memory access. The PWR_LED LED is blinking with a distinctive heartbeat
pattern and a frequency that depends on the system load.
Q: The system time is lost after reset, how to avoid that?
A: Unfortunately the Linux AT91SAM9 RTC driver is not yet operational. When it is
completed, you would just need a standard 3V battery at the socket at the back of the board.
Until then please set the date manually or use a network time synchronization utility as
ntpdate. Note also that AT91SAM9260 chips have a RomBOOT errata issue where
RomBOOT incorrectly resets the RTT on every system reset.
Acknowledgemens:
The kernel used is based on Linux-2.6.31-rc3
The root filesystem is a debian lenny distribution
The bootstrap loader is based on the at91bootstrap-2.4 package, provided by ATMEL at http://www.at91.com
The u-boot bootloader is based on a GIT checkout from http://git.denx.de/u-boot
The cross-compilers are available from http://www.codesourcery.com
All of the above packages are distributed under the GPL and/or another free license (e.g. BSD license).
ORDER CODE:
SAM9-L9260 – assembled and tested (no kit, no soldering required)
How to order?
You can order to us directly or by any of our distributors.
Check our web www.olimex.com/dev for more info.
All boards produced by Olimex are RoHS compliant
Software revision history:
REV.A
- created April 2008
REV.B
- created September 2008
- moved bootloaders and Linux kernel image to DATAFLASH because of SAM9 chip errata
- switched to codesourcery toolchain
- updated to Linux version 2.6.26.3
- updated to u-boot-1.3.4-git
- moved NAND flash root image writing into the SAM-BA script
REV.C
- created July 2009
- updated to Linux version 2.6.31-rc3
- updated to Debian Lenny ARMEL distribution
- updated to latest GIT checkout of u-boot (2009.06-00374-g3427faf)
Hardware revision:
Rev. B
- created June 2008
Disclaimer:
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Olimex Ltd. Other terms and product names may be trademarks of others.
The information in this document is provided in connection with Olimex products. No license, express or implied
or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex
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adapted or reproduced in any material from except with the prior written permission of the copyright holder.
The product described in this document is subject to continuous development and improvements. All particulars of
the product and its use contained in this document are given by OLIMEX in good faith. However all warranties
implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are
excluded.
This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for
any loss or damage arising from the use of any information in this document or any error or omission in such
information or any incorrect use of the product.