Download SPARC/CPU-5V Technical Reference Manual

SPARC CPU-5V Technical Reference Manual
3.3
Hardware Description
The Shared Memory
The microSPARC-II chip interfaces directly to a 64-bit wide DRAM on one side and to the
SBus on the other side. The shared DRAM is 64-bit wide with one parity bit for 32-bit data.
The SPARC CPU-5V provides 16- or 64-Mbyte DRAM which is assembled on the board itself.
There are 4-Mbit devices used to realize 16 Mbytes and there are 16-Mbit devices to realize 64
Mbytes.
The microSPARC-II chip supports up to eight memory banks (bank 0 to bank 7). Two of the
eight memory banks are used on the SPARC CPU-5V base board (bank 0 and bank 1). The
signals for the remaining memory banks are routed to the memory module connectors for
module #1 and module #2.
Memory connector for memory module #1 supports banks 2, 3, 4 and 5. Memory connector for
memory module #2 supports banks 4, 5, 6 and 7. Memory modules with up to 4 memory banks
can be used. As shown in the table below, the memory bank structure is organized so that
memory modules with a bank count from 1 to 4 (if available) can be used in any combination.
Each module has up to 4 banks, only up to 8 banks in total are allowed. A memory module can
contain bank A, or banks A and B, or banks A, B and C, or bank A, B, C and D.
Table 23: Bank Selection
Bank
Select
from
Processor
Base-board
Bank A
0
x
Module on Connector #1
Bank B
1
2
3
4
5
Bank A
Bank B
Bank C
Module on Connector #2
Bank D
Bank A
Bank C
Bank D
x
x
x
x
x
x
x
6
7
Bank B
x
x
The shaded area above shows an example of how the banks are selected by the processor. In
other words, the processor can select Bank B of the module on connector #1 by its own bank
select 3. CAUTION: Do not connect more than one physical memory bank to one bank select
from the processor. In other words, you can connect either bank C of the module on connector
# 1, or bank D of module on connector # 2 to bank select 4, or you can connect either bank D
of the module on connector # 1, or bank C of the module on connector # 2 to bank select 5.
FORCE COMPUTERS
Page 57