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Introduction
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Introduction
The Keil Microcontroller Prototyping System (MPS) enables evaluation and
®
™
prototyping of ARM Cortex -M class processors and user defined peripherals in a single
product. The MPS is the first prototyping system incorporating a full-speed Cortex-M class
processor implemented in FPGA which can be integrated with third-party peripheral IP to
deliver a prototyping system for hardware and software application development.
The MPS enables the implementation a Cortex-M class system without needing to have
access to the processor RTL, meaning different processors can be benchmarked in order
to choose the most suitable for the intended devices price/performance. Additionally, the
MPS is delivered fully configured with the Cortex-M processor and is fully tested so that
the user does not have to test the processor implementation and can immediately begin
adding third-party IP or writing software.
1.1
Purpose of this application note
The application note explains the example DUT FPGA design, how to rebuild it and
program it into the MPS.
It will guide you through and explain the;
1. Architecture of the system
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How the components are interconnected
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Clock and reset structure
2. Programmers model
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Interrupt assignment
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Memory map
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Peripheral register descriptions
3. FPGA design
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structure and directory format
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Rebuilding the FPGA image
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Configuring Hpe®_desk and MPS
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Programming the MPS with the new image
4. Example Software
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BootMonitor
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Selftest
5. Modifying the design
1.2
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Connecting to the outside world
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FPGA pin signal assignments
Overview of the hardware platform
The MPS was developed with two FPGAs to give the maximum flexibility for user
prototyping while maintaining IP protection of a Cortex-M class processor (to allow wide
customer accessibility without the need to license the processor). The use of the two
FPGAs allows the microcontroller, debug and memory subsystem to be implemented in
Application Note 227
ARM DAI0227A
Copyright © 2009 ARM Limited. All rights reserved.
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