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QuickPCI POST Diagnostic Card USER MANUAL http://www.qpci.com 2 Table of contents: Introduction .............................................................5 AWARD Elite (Version 4.51PG): .................................8 A WARD Version 6.0 (i810): .................................... 11 AMI Win BIOS: ....................................................... 18 AMI Ez-Flex BIOS: .................................................. 22 Phoenix 4.0 BIOS: .................................................. 27 Phoenix 4.0 Release 6.0: ......................................... 31 Award BIOS Beep Codes: ........................................ 37 AMI BIOS Beep Codes:............................................ 38 http://www.qpci.com 3 http://www.qpci.com 4 Introduction problem, the corresponding POST error code will give you information about the cause of the problem. QuickPCI POST Diagnostic Card With the QuickPCI POST Card, you now have an efficient, high quality and easy to operate diagnostic card at your disposal. This was designed for the PCI bus system, which has become standard and even enables you to diagnose "dead" PC's quickly. "Dead PC's" are no longer a problem with the QuickPCI POST Card, and neither are those time consuming intermittent power supply problems. Do you want to know more about the ATX timing or the PCI? Simply get plugged in. QuickPCI POST Card also comes with a 6 months manufacture warranty. PCI Interface As for the interface of the PCI bus, the QuickPCI POST Card was designed with a fast and programmable PLD-chip, which takes over decoding and monitoring of various bus signals. A special consideration during development was not only high functionality but also the future reliability of the design. Bus Tension Control To control the PCI bus tension, QuickPCI POST Card offers a variety of ways. Four LED's show the existing voltage +5V, +12V, -12V and 3.3 Volt. Reset and Clock Signal Monitoring To monitor the bus signal and reset line (PCI clock) the clock signal is under continuous monitoring of its two possible states ("0" logical low and "1" logical high). Simpler diagnostic boards often only check the first cycle of the clock and reset signal. QuickPCI POST Card shows the actual states of clock and reset signals using LED's. By using the PCI reset signal, any PC hardware device (chipset, cpu, graphics controller, and etc.) is reset to a defined state. A hardware failure on the main board or an add on card can cause the reset signal to stick to its active state. This event is called "Reset Loop" and prevents the PC system from booting. Reset Loops can be detected by watching the reset LED status. Power On Self Test (POST) Display QuickPCI POST Card features a 2-digit-hexadecimal-display. The extra bright display can even be read easily in dim light and features the monitoring of I/O Port address 80h, which is used in sequence from BIOS of PC booting to out put of POST codes. If the BIOS failed to boot, possibly due to a hard ware http://www.qpci.com 5 http://www.qpci.com 6 Feature Overview • Jumper less and easy to operate design • Real time monitoring of clock and reset signal • LED display for +12v, -12v, 3.3v and 5v bus voltages • Gold overlay of all mechanical contacts • 6 months warranty AWARD Elite (Version 4.51PG): 01 02 Processor test; Processor status verification Processor test 2; Read/Write and verify all CPU registers Initialize chips; Disable NMI, PIE, AIE, UEI, SQWV. Disable video, parity checking, DMA. Reset math coprocessor. Clear all page 03 registers and CMOS shutdown. Initialize DMA controller 0 and 1. Initialize interrupt controllers 0 and 1. 04 Test memory refresh toggle 05 Blank video, initialize keyboard; Keyboard controller initialization 07 Test CMOS interface and battery Set up low memory; Early chipset initialization, memory presence test, 08 OEM chipset routines, clear low 64K memory, test first 64K memory Early cache initialization; Cyrix CPU specific, CPU and cache 09 initialization 0A Set up interrupt vector table; Initialize first 120 interrupt vectors 0B Test CMOS RAM checksum 0C Initialize keyboard; Detect the type of keyboard controller Initialize video interface; Detect CPU clock, read CMOS location 14h to 0D find the type of video in use, detect and initialize video adapter Test video memory; Write sign-on message to screen, setup shadow 0E RAM Test DMA controller 0; BIOS checksum test, keyboard detect and 0F initialization 10 Test DMA controller 1 11 Test DMA page registers 12-13 Reserved 14 Test timer counter 2 15 Test 8259-1 mask bits 16 Test 8259-2 mask bits 17 Test stuck 8259 interrupt bits; Test stuck key http://www.qpci.com 7 http://www.qpci.com 8 18 Test 8259 interrupt functionality 19 Test stuck NMI bits (parity I/O check) 1A Benchmark; Display CPU clock 1B-1E Reserved Set EISA mode; If the EISA memory checksum is good then EISA is 1F initialized. If it's not good then ISA tests and clear EISA mode flag 20 Enable slot 0; System board 21-2F Enable slots 1-15 Size base and extended memory; Size the base memory from 256K to 30 640K and the extended memory above 1MB Test base and extended memory; Test the base memory from 256K 31 to 640K and the extended memory above 1MB using various bit patterns 32 Test EISA extended memory 33-3B Reserved 3C Setup enabled 3D Initialize and install mouse if present 3E Setup cache controller 40 Display virus protect disable or enable 41 Initialize floppy 42 Initialize hard drive 43 Detect & Init. serial & parallel ports 44 Reserved 45 Detect and Init. math coprocessor 46 Reserved 47 Reserved 48Reserved 4D 4E Mfg. POST loop, or display messages 4F Security password 50 Write CMOS; Write CMOS back to RAM and clear screen 51 Pre-boot enable; Enable parity checking, enable NMI, enable cache before boot Initialize option ROM's; Initialize and ROM's present at locations 52 C800h to EFFFFh 53 Initialize time value 60 Setup virus protect 61 Set boot speed 62 Setup numlock 63 Boot attempt B0 Spurious B1 Unclaimed NMI Chipset default initialization; Program chipset registers and power-on BE BIOS defaults. BF Chipset initialization; Reserved C0 Turn off chipset cache Memory presence test; OEM specific, test the size of on-board C1 memory C5 Early shadow; OEM specific, early shadow enable for fast boot C6 Cache presence test; External cache-size detection test E1-EF Setup pages FF Boot loader http://www.qpci.com 9 http://www.qpci.com 10 AWARD Version 6.0 (i810): 13h CFh C0h C1h C3h C5h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h Test CMOS read/write functionality Early chipset initialization: Disable shadow RAM, L2 cache (socket 7 and below), program basic chipset registers Detect memory: Auto detection of DRAM size, type and ECC, auto detection of L2 cache (socket 7 and below) Expand compressed BIOS code to DRAM Call chipset hook to copy BIOS back to E000 & F000 shadow RAM Expand the Xgroup codes located in physical memory address 1000:0 Reserved Initial Superio_Early_Init switch Reserved Blank out screen; Clear CMOS error flag Reserved Clear 8042 interface; Initialize 8042 self test Test special keyboard controller for Winbond 977 series Super I/O chips; Enable keyboard interface Reserved Disable PS/2 mouse interface (optional); Auto detect ports for keyboard & mouse followed by a port & interface swap (optional); Reset keyboard for Winbond 977 series Super I/O chips Reserved Reserved Reserved Test F000h segment shadow to see whether it is read/write capable or not. If test fails, keep beeping the speaker Reserved Auto detect flash type to load appropriate flash read/write codes into the run time area in F000 for ESCD & DMI support Reserved Use walking 1's algorithm to check out interface in CMOS circuitry. 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 20h 21h 22h 23h 24h 25h 26h Also set real time clock power status and then check for override Reserved Program chipset default values into chipset. Chipset default values are MODBINable by OEM customers Reserved Initial Early_Init_Onboard_Generator switch Reserved Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586 or 686) Reserved Reserved Initial interrupts vector table. If no special specified, all H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR Reserved Initial EARLY_PM_INIT switch Reserved Load keyboard matrix (notebook platform) Reserved HPM initialization (notebook platform) Reserved Check validity of RTC value; Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value instead; Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration of the ESCD's legacy information; Onboard clock generator initialization. Disable respective clock resource to empty PCI & DIMM slots; Early PCI initialization - Enumerate PCI bus number, assign memory & I/O resource, search for a valid VGA device & VGA BIOS, and put it into C000:0 Reserved Reserved Reserved http://www.qpci.com 11 http://www.qpci.com 12 27h 28h 29h 2Ah 2Bh 2Ch 2Dh 2Eh 2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch 3Dh 3Eh 3Fh 40h 41h 42h 43h Initialize INT 09 buffer Reserved Program CPU internal MTRR (P6 & PII) for 0-640K memory address; Initialize the APIC for Pentium class CPU; Program early chipset according to CMOS setup; Measure CPU speed; Invoke video BIOS Reserved Reserved Reserved Initialize Multilanguage; Put information on screen display, including Award title, CPU type, CPU speed, etc... Reserved Reserved Reserved Reserved Reserved Reset keyboard except Winbond 977 series Super I/O chips Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Test 8254 Reserved Test 8259 interrupt mask bits for channel 1 Reserved Test 9259 interrupt mask bits for channel 2 Reserved Reserved Test 8259 functionality 44h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh Reserved Reserved Reserved Initialize EISA slot Reserved Calculate total memory by testing the last double last word of each 64K page; Program writes allocation for AMD K5 CPU Reserved Reserved Reserved Reserved Program MTRR of M1 CPU; initialize L2 cache for P6 class CPU & program cacheable range; Initialize the APIC for P6 class CPU; On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges between each CPU are not identical reserved Initialize USB Reserved Test all memory (clear all extended memory to 0) Reserved Reserved Display number of processors (multi-processor platform) Reserved Display PnP logo; Early ISA PnP initialization and assign CSN to every ISA PnP device Reserved Initialize the combined Trend Anti-Virus code Reserved Show message for entering AWDFLASH.EXE from FDD (optional feature) Reserved Initialize Init_Onboard_Super_IO switch; Initialize http://www.qpci.com 13 http://www.qpci.com 14 Init_Onboard_AUDIO switch Reserved Reserved Okay to enter Setup utility Reserved Reserved Reserved Reserved Initialize PS/2 mouse Reserved Prepare memory size information for function call: INT 15h ax=E820h Reserved Turn on L2 cache Reserved Program chipset registers according to items described in Setup & 6Bh Auto-Configuration table 6Ch Reserved Assign resources to all ISA PnP devices; Auto assign ports to onboard 6Dh COM ports if the corresponding item in Setup is set to "AUTO" 6Eh Reserved 6Fh Initialize floppy controller; Setup floppy related fields in 40:hardware 70h Reserved 71h Reserved 72h Reserved Enter AWDFLASH.EXE if: AWDFLASH.EXE is found in floppy dive and 73h ALT+F2 is pressed 74h Reserved 75h Detect and install all IDE devices: HDD, LS120, ZIP, CDROM... 76h Reserved 77h Detect serial ports and parallel ports 78h Reserved 79h Reserved 5Eh 5Fh 60h 61h 62h 63h 64h 65h 66h 67h 68h 69h 6Ah 7Ah 7Bh 7Ch 7Dh 7Eh Detect and install coprocessor Reserved Reserved Reserved Reserved Switch back to text mode if full screen logo is supported: if errors 7Fh occur, report errors & wait for keys, if no errors occur or F1 key is pressed continue - Clear EPA or customization logo 80h Reserved 81h Reserved Call chipset power management hook: Recover the text fond used by 82H EPA logo (not for full screen logo), If password is set, ask for password 83H Save all data in stack back to CMOS 84h Initialize ISA PnP boot devices Final USB initialization; NET PC: Build SYSID structure; Switch screen back to text mode; Set up ACPI table at top of memory; Invoke ISA 85h adapter ROM's; Assign IRQ's to PCI devices; Initialize APM; Clear noise of IRQ's 86h Reserved 87h Reserved 88h Reserved 89h Reserved 90h Reserved 91h Reserved 92h Reserved 93h Read HDD boot sector information for Trend Anti-Virus code Enable L2 cache; Program boot up speed; Chipset final initialization; Power management final initialization; Clear screen and display 94h summary table; Program K^ write allocation; Program P6 class write combining 95h Program daylight saving; Update keyboard LED and typematic rate http://www.qpci.com 15 http://www.qpci.com 16 96h FFh Build MP table; Build and update ESCD; Set CMOS century to 20h or 19h; Load CMOS time into DOS timer tick; Build MSIRQ routing table Boot attempt (INT 19h) AMI Win BIOS: 00 01 02 03 05 06 08 08 0A 0B 0C 0D 0E 0F 10 11 12 13 14 19 20 23 24 25 26 27 28 2A 2B Control to Int 19 boot loader Disable NMI Power-on delay Soft reset power-on Disable cache Uncompressed POST code CMOS checksum CMOS initialization CMOS initialization for date and time Initialization before keyboard batch Batch command to keyboard controller Verify batch command Initialize after KB controller batch Write KB command byte Pin 23/24 block/unblock command Check for <INS> key command DMA/PIC disable Chipset initialization 8254 timer test Memory refresh test Base 64K memory test Set BIOS stack, setup before int. vector init Interrupt vector initialization Read input port of 9042 chip, clear password Initialize global data for turbo switch Initialize before setting video mode Set video mode Initialize BUS Setup before operational video check http://www.qpci.com 17 http://www.qpci.com 18 2C 2D 2E 2F 30 31 32 34 37 38 39 3A 3B 40 42 43 44 45 46 47 48 49 4B 4C 4D 4E 4F 50 51 52 53 54 Control to optional video ROM Proc. after optional video ROM routine Display memory Read/Write test if no EGA/VGA Display memory Read/Write test Retrace check Display alternate memory Read/Write check Alternate display retrace check Set display mode Display power-on message Initialize BUS types Display BUS initialization error messages Display the hit <DEL> message Virtual modem memory test Prepare descriptor tables Enter virtual mode for memory test Enable Interrupts for diagnostic mode Initialize data to check memory wrap at 0:0 Check memory wrap, find total memory amount Memory write test 640K base memory write test Determine memory below 1MB Determine memory above 1MB Check for soft reset, clear memory below 1MB Clear memory above 1MB Save memory size Display first 64K memory size Sequential and random memory test Displayed memory size Above 1MB memory test Save memory size information Enter real mode Disable gate A-20 line 57 58 59 60 62 65 66 67 7F 80 81 82 83 84 85 86 87 88 89 8B 8C 8D 8E 8F 91 94 95 96 97 98 99 9A Adjust memory size Clear hit <DEL> message DMA/PIC test DMA #1 base register test DMA #2 base register test Program DMA unit 1 and 2 Initialize 8259 Interrupt controller Keyboard test Enable extended NMI sources Stuck key and batch test Keyboard controller test Write command byte, initialize circular buffer Lock key check Compare memory size with CMOS Password/soft error check Programming before check Execute CMOS setup Programming after setup Power-on display Shadow main and video BIOS Setup options after CMOS setup Initialize mouse Reset hard disk controller Floppy setup Hard disk setup Base/extended memory size Init. PCI/VLB BUS optional ROM's from C800 Initialize before C800 optional ROM control Control to optional ROM Processing after optional ROM control Setup timer data area/printer base address Set RS-232 base address http://www.qpci.com 19 http://www.qpci.com 20 9B 9C 9D 9E 9F A0 A1 A2 A4 A5 A7 A8 A9 AA B0 B1 C2 C5 C6 C7 C8 CA CB CD CE CF D1 D2 D3 D4 D5 DD AMI Ez-Flex BIOS: Initialize before NPU test NPU initialization Initialization after NPU test Check extended KB, KB ID and num-lock Issue keyboard ID command Reset keyboard ID flag Cache memory test Display and soft errors Program memory wait states Clear screen, enable parity NMI Init. needed before control to E000 ROM Control to E000 ROM Init. needed after control to E000 ROM Display system configuration Uncompressed SETUP code for hot-key Copy any code to specific area Disable NMI, power-on delay Enable ROM, disable cache ROM BIOS checksum CMOS shutdown register test CMOS shutdown Initialize CMOS date and time Initialization before keyboard batch BAT command to keyboard controller Installation after keyboard controller batch Write keyboard command byte Check for <INS> key command Disable DMA and Interrupt controllers Chipset initialization/auto detect memory Uncompressed RUNTIME code RUNTIME code uncompressed Control to shadow RAM at F000:F000 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 20 21 NMI disabled; Start CPU flag test Power on delay Initialize system chipset Check keyboard for soft/hard reset Enable ROM ROM BIOS checksum tested 8042 keyboard controller tested 8042 keyboard controller tested 8042 keyboard controller tested 8042 keyboard controller tested 8042 protected mode tested 8042 keyboard controller tested CMOS RAM shutdown register tested CMOS checksum tested CMOS initialization CMOS/RTC status OK Disable DMA and PIC Video display disabled Chipset and memory initialized 8254 PIT tested PIT channel 2 tested PIT channel 1 tested PIT channel 0 tested PIT memory refresh tested PIT memory refresh tested Check 15 microsecond refresh (PIT) Base 64K memory tested Address lines tested Base 64K parity memory tested http://www.qpci.com 21 http://www.qpci.com 22 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 40 41 42 43 44 45 46 Memory Read/Write tested Perform setup's prior to initialization of the vector table Initialize BIOS vector table in lower 1KB of system RAM 8042 keyboard controller tested Global for keyboard controller tested Perform setups for vector table initialization Monochrome video mode tested Video (CGA) color mode tested Parity enable tested Check for optional ROM's Check for video ROM Determine if EGA/VGA is installed Video memory is tested if non EGA/VGA Video memory tested Video adapter tested Alternate video memory tested Alternate video adapter tested Video mode tested Video mode tested BIOS ROM data area initialized Power on display cursor set Power on message displayed Cursor position read Display cursor reference Display Setup message Protected mode tested Build descriptor tables CPU enters protected mode Protected mode interrupt enabled Descriptor tables checked Memory size checked Memory read/Write tested 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 80 81 82 83 84 Base 640K memory tested Memory below 1MB checked for Memory above 1MB checked for ROM BIOS data area checked Memory below 1MB cleared for soft reset Memory above 1MB cleared for soft reset Update CMOS memory size Display base 64K memory test Memory test on base 640K performed RAM size updated for shadow operation Extended memory test performed System is prepared for real mode CPU is returned to real mode CPU registers are returned to real mode A20 gate disabled BIOS data area rechecked BIOS data area check complete Setup message displayed DMA register page tested Display memory verified DMA #1 tested DMA #2 tested Perform BIOS data area check BIOS data area checked DMA initialized 8259 PIC initialized Keyboard tested Keyboard reset Check for stuck key and batch test 8042 keyboard controller tested Lock key checked Memory size compared to CMOS http://www.qpci.com 23 http://www.qpci.com 24 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 Password and soft error checked CMOS equipment checked performed CMOS setup performed if selected Main chipset reinitialized after CMOS setup Power on message displayed Mouse check and wait message displayed Any ROM's attempted to be shadowed System initialized through CMOS settings Hard drives and floppy drives reset Floppy disk setup compared to CMOS settings Floppy controller initialized Hard disks setup compared to CMOS settings Hard disk controller initialized BIOS data table checked BIOS data table check complete Memory size set Display memory verified All Interrupts cleared Optional ROM's checked for All Interrupts cleared Timer data setup Serial ports checked for All Interrupts cleared Math coprocessor checked All Interrupts cleared Extended keyboard checked NumLock set on keyboard Keyboard reset Cache memory size tested Display any soft errors Typematic rate set Memory wait states set A5 A6 A7 A8 A9 AA 00 Display is cleared Parity and NMI enabled All Interrupts cleared System control is turned over to ROM at E0000 All Interrupts cleared Displayed configuration Call to Interrupt 19 for boot loader http://www.qpci.com 25 http://www.qpci.com 26 Phoenix 4.0 BIOS: 02 04 06 08 09 0A 0C 0E 10 11 12 14 16 18 1A 1C 20 22 24 28 2A 2C 2E 32 37 38 39 3A 3C Verify real mode Get CPU type Initialize system hardware Initialize chipset registers with initial POST values Set in POST flag Initialize CPU registers Initialize cache to initial POST values Initialize I/O Initialize power management Load alternate registers with initial POST values Jump to UserPatch0 Initialize keyboard controller BIOS ROM checksum 8254 programmable interrupt timer initialization 8237 DMA controller initialization Reset 8254 programmable interrupt timer Test DRAM refresh Test 8742 keyboard controller Set ES segment register to 4GB Auto size DRAM Clear 512K base RAM Test 512K base address lines Test 512K base memory Test CPU bus-clock frequency Reinitialize the chipset Shadow system BIOS ROM Reinitialize the cache Auto size cache Configure advanced chipset registers 3D 40 42 44 46 48 49 4A 4C 4E 50 52 54 56 58 5A 5C 60 62 64 66 68 6A 6C 6E 70 72 74 76 7C 7E 80 Load alternate registers with CMOS values Set initial CPU speed Initialize interrupt vectors Initialize BIOS interrupts Check ROM copyright notice Check video configuration against CMOS Initialize PCI bus and devices Initialize all video adapters in system Shadow video BIOS ROM Display copyright notice Display CPU type and speed Test keyboard Set key click if enabled Enable keyboard Test for unexpected interrupts Display prompt "Press F2 to Enter Setup" Test RAM between 512K and 640K Test expanded memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Enable external and CPU caches Display external cache size Display shadow message Display non-disposable segments Display error messages Check for configuration errors Test real time clock Check for keyboard errors Setup hardware interrupts vectors Test coprocessor if present Disable onboard I/O ports http://www.qpci.com 27 http://www.qpci.com 28 82 84 86 88 8A 8C 90 91 92 94 96 98 9A 9C 9E A0 A2 A8 AA AC AE B0 B2 B4 B6 B8 BC BE BF C0 D0 D2 Detect and install external RS232 ports Detect and install external parallel ports Re-initialize on-board I/O ports Initialize BIOS data area Initialize extended BIOS data area Initialize floppy controller Initialize hard disk controller Initialize local bus hard disk controller Jump to UserPatch2 Disable A20 address line Clear huge ES segment register Search for option ROM's Shadow option ROM's Setup power management Enable hardware interrupts Set time of day Check key lock Erase F2 prompt Scan for F2 keystroke Enter setup Clear in-POST flag Check for errors POST done; prepare to boot operating system One beep Check password (optional) clear global descriptor table Clear parity checkers Clear screen (optional) Check virus and backup reminders Try to boot interrupt 19 Interrupt handler error Unknown interrupt error D4 D6 D8 DA DC E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE Pending interrupt error Initialize option ROM error Shutdown error Extended block move Shutdown 10 error Initialize the chipset Initialize refresh counter Check for forced flash Check HW status of ROM BIOS ROM is ok Do a complete RAM test Do OEM initialization Initialize interrupt controller Read in bootstrap code Initialize all vectors Boot the flash program Initialize the boot device Boot code was read ok http://www.qpci.com 29 http://www.qpci.com 30 Phoenix 4.0 Release 6.0: 02 03 04 06 07 08 09 0A 0B 0C 0E 0F 10 11 12 13 14 16 17 18 1A 1C 20 22 24 26 28 29 2A Verify real mode Disable non-maskable interrupt (NMI) Get CPU type Initialize system hardware Disable shadow and execute code from the ROM Initialize chipset with initial POST values Set IN POST flag Initialize CPU registers Enable CPU cache Initialize caches to initial POST values Initialize I/O component Initialize the local bus IDE initialize power management Load alternate registers with initial POST values Restore CPU control word during warm boot Initialize PCI bus mastering devices Initialize keyboard controller BIOS ROM checksum Initialize cache before memory auto size 8254 programmable interrupt timer initialization 8237 DMA controller initialization Reset programmable interrupt controller Test DRAM refresh Test 8742 keyboard controller Set ES segment register to 4GB Enable gate A20 line Auto size DRAM Initialize POST memory manager Clear 512KB base RAM 2C 2E 2F 30 32 33 36 38 3A 3C 3D 41 42 45 46 47 48 49 4A 4B 4C 4E 4F 50 51 52 54 55 58 59 5A 5B RAM failure on address line xxxx RAM failure on data bits xxxx of low byte of memory bus Enable cache before system BIOS shadow RAM failure on data bits xxxx of high byte of memory bus Test CPU bus clock frequency Initialize Phoenix Dispatch Manager Warm start shut down Shadow system BIOS ROM Auto size cache Advanced configuration of chipset registers Load alternate registers with CMOS values Initialize extended memory for RomPilot Initialize interrupt vectors POST device initialization Check ROM copyright notice Initialize I20 support Check video configuration against CMOS Initialize PCI bus and devices Initialize all video adapters in system Quiet Boot start (optional) Shadow video BIOS ROM Display BIOS copyright notice Initialize MultiBoot Display CPU type and speed Initialize EISA board Test keyboard Set key click if enabled Enable USB devices Test for unexpected interrupts Initialize POST display service Display prompt "Press F2 to enter SETUP" Disable CPU cache http://www.qpci.com 31 http://www.qpci.com 32 5C 60 62 64 66 67 68 69 6A 6B 6C 6E 70 72 76 7C 7D 7E 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8F Test RAM between 512KB and 640KB Test extended memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup system management mode (SMM) area Display external L2 cache size Load custom defaults (optional) Display shadow area message Display possible high address for UMB recovery Display error messages Check for configuration errors Check for keyboard errors Set up hardware interrupt vectors Initialize Intelligent System Monitoring Initialize coprocessor if present Disable onboard super I/O ports and IRQ's Late POST device initialization Detect and install external RS232 ports Configure non-MCD IDE controllers Detect and install external parallel ports Initialize PC compatible PnP ISA devices Reinitialize onboard I/O ports Configure motherboard configurable devices (optional) Initialize BIOS data area Enable non-maskable interrupts (NMI's) Initialize extended BIOS data area Test and initialize PS/2 mouse Initialize floppy controller Determine number of ATA drives (optional) 90 91 92 93 95 96 97 98 99 9A 9C 9D 9E 9F A0 A2 A4 A8 AA AC AE B0 B1 B2 B4 B5 B6 B7 B9 BA BB BC Initialize hard disk controllers Initialize local bus hard disk controllers Jump to UserPatch2 Build MPTABLE for multi processor boards Install CD ROM for boot Clear huge ES segment register Fix up multi processor table Search for option ROM's Check for SMART drive (optional) Shadow option ROM's Set up power management Initialize security engine (optional) Enable hardware interrupts Determine number of ATA and SCSI drives Set time of day Check key lock Initialize typematic rate Erase F2 prompt Scan for F2 key stroke Enter setup Clear boot flag Check for errors Inform Rom Pilot about the end of POST POST done - prepare to boot operating system One short beep Terminate Quiet Boot (optional) Check password Initialize ACPI BIOS Prepare boot Initialize DMI parameters Initialize PnP option ROM's Clear parity checkers http://www.qpci.com 33 http://www.qpci.com 34 BD BE BF C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE D2 E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA Display multiboot menu Clear screen Check virus and backup reminders Try to boot with interrupt 19 Initialize POST Error Manager (PEM) Initialize error logging Initialize error display function Initialize system error handler PnP dual CMOS (optional) Initialize notebook docking (optional) Initialize notebook docking late Force check (optional) Extended checksum (optional) Redirect Int 15h to enable remote keyboard Redirect Int 13 to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk Redirect Int 10h to enable remote serial video Re-map I/O and memory for PCMCIA Initialize digitizer and display message Unknown interrupt The following are for boot block in Flash ROM Initialize the chipset Initialize the bridge Initialize the CPU Initialize the system timer Initialize system I/O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 initialize PIC and DMA Initialize Memory type Initialize Memory size Shadow Boot Block System memory test Initialize interrupt vectors Initialize Run Time Clock Initialize video Initialize System Management Manager Output one beep Clear Huge Segment Boot to mini DOS Boot to Full DOS http://www.qpci.com 35 http://www.qpci.com 36 Award BIOS Beep Codes: Beeps Error Message 1long, 2 short Video adapter error AMI BIOS Beep Codes: Description Either video adapter is bad or is not seated properly. Also, check to ensure the monitor cable is connected properly. Check for improperly seated or missing memory. Repeating Memory error (endless loop) No video card or bad 1long, 3short Reseat or replace the video card. video RAM High Check the CPU fan for proper frequency Overheated CPU operation. Check the case for proper beeps while air flow. running Either the CPU is not seated properly or Repeating the CPU is damaged. May also be due CPU High/Low to excess heat. Check the CPU fan or BIOS settings for proper fan speed. Beeps 1 short 2 short 3 short 4 short 5 short 6 short 7 short 8 short 9 short 10 short 11 short Error Message Description The programmable interrupt timer or DRAM refresh failure programmable interrupt controller has probably failed A memory parity error has occurred in the Memory parity error first 64K of RAM. The RAM IC is probably bad Base 64K memory A memory failure has occurred in the first failure 64K of RAM. The RAM IC is probably bad The system clock/timer IC has failed or System timer failure there is a memory error in the first bank of memory Processor error The system CPU has failed The keyboard controller IC has failed, which is not allowing Gate A20 to switch Gate A20 failure the processor to protected mode. Replace the keyboard controller Virtual mode The CPU has generated an exception processor exception error because of a fault in the CPU or error motherboard circuitry Display memory The system video adapter is missing or read/write error defective The content of the system BIOS ROM ROM checksum does not match the expected checksum error value. The BIOS ROM is probably defective and should be replaced CMOS shutdown register read/write The shutdown for the CMOS has failed error Cache error The L2 cache is faulty http://www.qpci.com 37 http://www.qpci.com 38 An error was encountered in the video BIOS ROM, or a horizontal retrace failure has been encountered 1 long, 3 A fault has been detected in memory Memory test failure short above 64KB 1 long, 8 The video adapter is either missing or Display test failure short defective 2 short POST Failure One of the hardware tested have failed POST has passed all 1 long tests 1 long, 2 Failure in video short system http://www.qpci.com 39 http://www.qpci.com 40 http://www.qpci.com 41 http://www.qpci.com 42 http://www.qpci.com 43 http://www.qpci.com 44 http://www.qpci.com 45 http://www.qpci.com 46 http://www.qpci.com 47 http://www.qpci.com 48