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Download MCF5329 - Reference Manual
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ColdFire Core Table 3-16. Miscellaneous Instruction Execution Times (continued) Effective Address Opcode <EA> Rn (An) (An)+ -(An) (d16,An) (d8,An,Xn*SF) xxx.wl #xxx MOVE.W <ea>,SR 7(0/0) — — — — — — 7(0/0) 2 MOVEC Ry,Rc 9(0/1) — — — — — — — MOVEM.L <ea>,and list — 1+n(n/0) — — 1+n(n/0) — — — MOVEM.L and list,<ea> — 1+n(0/n) — — 1+n(0/n) — — — 3(0/0) — — — — — — — 2(0/1) — NOP PEA <ea> PULSE 2(0/1) 4 5 — 2(0/1) — — 1(0/0) — — — — — — — 3(0/1) STOP #imm — — — — — — — 3(0/0) 3 TRAP #imm — — — — — — — 15(1/2) TPF 1(0/0) — — — — — — — TPF.W 1(0/0) — — — — — — — TPF.L 1(0/0) — — — — — — — UNLK Ax 2(1/0) — — — — — — — WDDATA <ea> — 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) — WDEBUG <ea> — 5(2/0) — — 5(2/0) — — — 1The n is the number of registers moved by the MOVEM opcode. a MOVE.W #imm,SR instruction is executed and imm[13] equals 1, the execution time is 1(0/0). 3The execution time for STOP is the time required until the processor begins sampling continuously for interrupts. 4PEA execution times are the same for (d16,PC). 5PEA execution times are the same for (d8,PC,Xn*SF). 2If 3.3.5.6 EMAC Instruction Execution Times Table 3-17. EMAC Instruction Execution Times Effective Address Opcode <EA> Rn (An) (An)+ -(An) (d16,An) (d8,An, xxx.wl Xn*SF) #xxx MAC.L Ry, Rx, Raccx 1(0/0) — — — — — — — MAC.L Ry, Rx, <ea>, Rw, Raccx — 3(1/0) 3(1/0) 3(1/0) 3(1/0)1 — — — MAC.W Ry, Rx, Raccx 1(0/0) — — — — — — — MAC.W Ry, Rx, <ea>, Rw, Raccx — 3(1/0) 3(1/0) 3(1/0) 3(1/0)1 — — — MOVE.L <ea>y, Raccx 1(0/0) — — — — — — 1(0/0) MOVE.L Raccy,Raccx 1(0/0) — — — — — — — MOVE.L <ea>y, MACSR 5(0/0) — — — — — — 5(0/0) MCF5329 Reference Manual, Rev 3 3-28 Freescale Semiconductor
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