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Interrupt Controller Modules Table 14-7. INTFRCHn Field Descriptions Field Description 31–0 Interrupt force. Allows software generation of interrupts for each possible source for functional or debug purposes. INTFRCH 0 No interrupt forced on the corresponding interrupt source 1 Force an interrupt on the corresponding source Address 0xFC04_8014 (INTFRCL0) 0xFC04_C014 (INTFRCL1) Access: User read/write 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 R 8 7 6 5 4 3 2 1 0 INTFRCL W Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Figure 14-6. Interrupt Force Register Low (INTFRCLn) Table 14-8. INTFRCLn Field Descriptions Field Description 31–0 INTFRCL Interrupt force. Allows software generation of interrupts for each possible source for functional or debug purposes. 0 No interrupt forced on corresponding interrupt source 1 Force an interrupt on the corresponding source 14.2.4 Interrupt Configuration Register (ICONFIG) This 16-bit register defines the operating configuration for the interrupt controller module. NOTE Only one copy of this register exists among the 2 interrupt controller modules. All reads and writes to this register must be made to the INTC0 memory space. Address: 0xFC04_801A (ICONFIG) 15 14 13 R 11 10 9 ELVLPRI W Reset 12 Access: User read/write 0 0 0 0 0 0 0 8 7 6 0 0 0 0 0 0 5 EMASK 0 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 Figure 14-7. Interrupt Configuration Register (ICONFIG) MCF5373 Reference Manual, Rev 3 Freescale Semiconductor 14-7
