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Table 7-9. VHDL Output Options - Power Tab
Option
Description
Type used for bit by VHDL
writer:
std_logic - This type allows a choice of nine values (0, 1, X, L, H,
W, U, -, Z). Other bit choices allow 0, 1 only.
VHDL Vector Type
std_logic_vector
Specify the type for the bit-vector used in VHDL writer.
Allow Writing Busses: - Before V1998.2, LeonardoSpectrum split busses. For example, A0 and A1 were split
into individual bits for writing busses. Now you can write A+B=sum to indicate that A bus + B bus is the sum.
Write VHDL_87: This directs LeonardoSpectrum to read 1987 style VHDL instead of 1993 style VHDL.
Click Apply to apply options. Click Help for assistance.
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LeonardoSpectrum User’s