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Download MPC8240 Integrated Processor User`s Manual
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Freescale Semiconductor, Inc. Memory Interface Valid (MIV) SDRAM_CLK[0:3] RP1 RASP RC RAS/CS[0:7] CRP CAS3 RCD2 CP4 CAS5 CP4 CAS5 CP4 CAS5 CAS/DQM[0:7] CP PC RSH CSH ADDRESS ROW ASR COL RAH DATA ASC Freescale Semiconductor, Inc... CAH COL DATA1 DH DS DH WCH WCS WCH COL RAL RHCP CAH DATA0 DS WE COL DATA2 DATA3 RAD WP WCS DEBUG ADDRESS VALID VALID VALID VALID MIV MAA VALID NOTES: 1. Subscripts identify programmable timing variables (RP1, RCD2, CAS3). 2. MIV asserts for address, control, and data on the first clock cycle that RAS or CAS is asserted for a write. Figure 15-11. Example EDO Debug Address, MIV, and MAA Timings for Burst Write Operation MPC8240 Integrated Processor User’s Manual For More Information On This Product, Go to: www.freescale.com
