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Value Change Dump (VCD) Files
Using Extended VCD as Stimulus
Simulating with Input Values from a VCD File
When simulating with inputs from an extended VCD file, you can simulate only one design unit
at a time. In other words, you can apply the VCD file inputs only to the top level of the design
unit for which you captured port data.
The general procedure includes two steps:
1. Create a VCD file for a single design unit using the vcd dumpports command.
2. Resimulate the single design unit using the -vcdstim argument to vsim. Note that
-vcdstim works only with VCD files that were created by a ModelSim simulation.
Example 13-1. Verilog Counter
First, create the VCD file for the single instance using vcd dumpports:
% cd ~/modeltech/examples/misc
% vlib work
% vlog counter.v tcounter.v
% vsim test_counter
VSIM 1> vcd dumpports -file counter.vcd /test_counter/dut/*
VSIM 2> run
VSIM 3> quit -f
Next, rerun the counter without the testbench, using the -vcdstim argument:
% vsim -vcdstim counter.vcd counter
VSIM 1> add wave /*
VSIM 2> run 200
Example 13-2. VHDL Adder
First, create the VCD file using vcd dumpports:
% cd ~/modeltech/examples/misc
% vlib work
% vcom gates.vhd adder.vhd stimulus.vhd
% vsim testbench2
VSIM 1> vcd dumpports -file addern.vcd /testbench2/uut/*
VSIM 2> run 1000
VSIM 3> quit -f
Next, rerun the adder without the testbench, using the -vcdstim argument:
% vsim -vcdstim addern.vcd addern -gn=8 -do "add wave /*; run 1000"
Example 13-3. Mixed-HDL Design
First, create three VCD files, one for each module:
ModelSim User’s Manual, v6.3g
May 2008
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