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R
Arithmetic Operations
always @(A or B or OPER)
begin
if (OPER==1’b0)
RES = A + B;
else
RES = A - B;
end
endmodule
Comparators (=, /=,<, <=, >, >=)
This section contains a VHDL and Verilog description for an unsigned 8-bit greater or
equal comparator.
Log File
The XST log file reports the type and size of recognized comparators during the Macro
Recognition step.
...
Synthesizing Unit <compar>.
Related source file is comparators_1.vhd.
Found 8-bit comparator greatequal for signal <$n0000> created at
line 10.
Summary:
inferred
1 Comparator(s).
Unit <compar> synthesized.
=============================
HDL Synthesis Report
Macro Statistics
# Comparators
8-bit comparator greatequal
==============================
...
: 1
: 1
Unsigned 8-bit Greater or Equal Comparator
The following table shows pin descriptions for a comparator.
IO pins
XST User Guide
Description
A[7:0], B[7:0]
Comparison Operands
CMP
Comparison Result
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