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Download MPC8572 Development System User`s Guide
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Evaluation Support Table 1. MPC8572DS Evaluation Summary (continued) MPC8572 Feature I2C System Evaluation Support/Methods Bus 1 Boot initialization code Voltage Monitoring SERDES CLOCK 1 AT97SC3203S Trusted Platform Module Bus 2 DDR Bus 1 and 2 DIMM modules SPD EEPROMs System (MAC address storage, serial number, etc.) Board EEPROM PEX/PCI Slots (as “SMBus”) Serial UART ports 0-1 UART: Supports 2-wire and 4-wire modes for two serial ports muxed to one serial connector. Clocking DDRCLK Digitally settable clock generator. Switch-selectable coarse settings. Software-selectable fine settings. SYSCLK Digitally settable clock generator. Switch-selectable coarse settings. Software-selectable fine settings. REFCLK SERDES reference clocks to SERDES’s on MPC8572, ULI and slots. RTCCLK Reference clock. DMA DMA(0:3) REQ/ACK/Done Test points. IRQs IRQ*(0:11) EVENT switch asserts IRQ* but can drive SRESET via software setting. IRQ_OUT SRESET* VCore Power VDD VID switch settable Pixis software-monitored/controlled voltages 7-bit encoded voltage MPC8572 Development System User’s Guide, Rev. 1 Freescale Semiconductor 5
