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signal with a pull-up or pull-down resistor, it is good practice to drive the signal to the DC value
before tri-stating. (So that simulation will match emulation result).
17 SPI FLASH
Several FPGAs on the DN9000K10 have a SPI Flash chip attached to them. This chip allows
you to store a sizable amount of microcode for running a built-in processor (128Mb is the
capacity at the time of writing, although in the future larger capacities will become available).
The following tables are a list of flash chips and associated FPGAs:
FPGA
F0
F1
F2
F12
F13
F14
Flash Chip
U2
U3
U13
U91
U117
U99
If you wish to use your own design and access the SPI lines directly, use the following pins
(same on all FPGAs):
Signal
Pin # Signal Desciption
FLASH_HOLDn
R28
Pause serial communication without de-selection of device
(active low)
FLASH_CSn
R27
Chip select (active low)
FLASH_WPn
M13
Write protect (active low)
FLASH_DIN
N13
Flash Serial Data In (output from FPGA, input to Flash)
FLASH_CLK
P27
Flash Serial Clock
FLASH_DOUT
P26
Flash Serial Data Out (output from Flash, input to FPGA)
Note: For complete pin descriptions, see the datasheet for the ST Microelectronics M25P128 Flash Chip.
The flash chip used on the board is the ST Microelectronics M25P128. This SPI flash can
operate from 0 to 20MHz, and up to 50MHz for some instructions (notably, FAST_READ).
There are only a few user-controlled signals so writing a controller for this chip is easy.
A reference design capable of accessing the flash chip is provided. This design does not include
a controller; it simply gives register access to the control lines. Implementation of controller
functionality is left up to the software. The following is a memory map of the flash control lines
as accessed through the main bus:
Signal
FLASH_CLK
FLASH_CSN
FLASH_DIN
FLASH_DOUT
DN9000K10 User Guide
Register
0x*800007B bit 0
0x*800007B bit 1
0x*800007B bit 2
0x*800007B bit 3
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