Download EDP-CM-LPC1768 Command Module User Manual Version 2.03

EDP-CM-LPC1768 CPU Module
EDP-CM-LPC1768 Command Module
User Manual
Version 2.03
10th June 2010
Electrocomponents plc
Page 1
EDP-CM-LPC1768 CPU Module
Contents
1.
Introduction
2.
2.1
2.2
2.3
2.4
2.5
MCU Mapping
3
MCU Pin Allocation ......................................................................... 3
Resources Used/Available by the LPC1768 ................................... 6
Alphabetical Listing of MCU pins .................................................... 8
Backplane Signal Names and Connections .................................... 9
Mapping Aids ................................................................................ 13
3.
Solder Link Options
14
4.
Zero Ohm Links
19
5.
5.1
5.2
5.3
5.4
Software Support
19
RSEDP_Test_Suite....................................................................... 20
MC1_Test_Suite ........................................................................... 20
MC2_Test_Suite ........................................................................... 20
Easy Web ...................................................................................... 20
Electrocomponents plc
3
Page 2
EDP-CM-LPC1768 CPU Module
1. Introduction
The RS-EDP platform is a system, has been designed to utilise many different manufacturers’
microprocessors. To support NXP range or ARM/Cortex MCU’s a single Command Module (CM) has
been designed to accommodate four different device types. These are LPC2368 (ARM7), LPC1768
(Cortex M3), LPC1343 (Cortex M3) and LPC1113 (Cortex M0).
Each of the boards come with its own suite of software to fully exercise the RS-EDP Application
Modules and the peripherals available on the MCU device.
In an RS-EDP system there is usually one Command Module (CM) and one or more Applications
Modules (AM) plugged in to the Base Board (BB). These NXP modules have been designed as the
Command Module for the system.
The ‘Command Module’ in a system dictates whether the whole system is a 3.3V one or a 5.0V one.
All of these modules use a 3.3V microprocessor and consequently the I/O is mostly 3.3V also.
To tell the rest of the system the Command Module is a 3.3V one not a 5.0V one, the Vcc_CM line on
the base board is connected to 3.3V by the tracking on the Command Module board. This Vcc_CM is
used as a reference by the other modules, such as the analogue module, to limit the output voltage
to 3.3V. The command voltage line is also used by the #RESET circuit, as the voltage reference to pull
up to after the reset line has been asserted low.
The RS-EDP-CM-NXP module maps the I/O of the MCU on the board to the backplane of the RS-EDP
system. As there are quite a few dual function pins on the NXP processors and hence several link
options have been made to accommodate the various options the user may wish to use. Extensive
use of the I2C capability is used to communicate to the application modules in the system.
2. MCU Mapping
2.1 MCU Pin Allocation
The MCU pins have been connected to the backplane via the following configuration.
LPC1768BDM100
Comment
Pin
1
2
3
4
5
6
Name
TDO/SWO
TDI
TMS/SWDIO
#TRST
TCK/SWDCLK
P0[26]/AD0[3]/AOUT/RXD3
7
P0[25]/AD0[2]/I2SRX_SDA/TXD3
8
P0[24]/AD0[1]/I2SRX_WS/CAP3[1]
9
P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]
10
Vdda
11
Vssa
12
VREFP
13
NC
Electrocomponents plc
RS-EDP-BASE BOARD mapping
Name
JTAG interface on LPC module
JTAG interface on LPC module
JTAG interface on LPC module
JTAG interface on LPC module
JTAG interface on LPC module
3 link options
3 link options
3 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
Jumper option to SGND
2 link options
2 link options
Page 3
AN3
AN11
CPU_DACO0_GPIO17
AN2
AN10
AN1
AN9
AN0
AN8
AN_REF
Vcc_CM
VAGND
SGND
AN_REF
Vcc_CM
3.3V
EDP-CM-LPC1768 CPU Module
14
15
#RSTOUT
VREFN
16
17
18
19
RTCX1
#RESET
STCX2
VBAT
20
P1[31]/SCK1/AD0[5]
21
P1[30]/Vbus/AD0[4]
22
23
24
25
XTAL1
XTAL2
P0[28]/SCL0/USB_SCL
P0[27]/SDA0/USB_SDA
26
P3[26]/STCLK/MAT0[1]/PWM1[3]
27
P3[25]/MAT0[0]/PWM1[2]
28
29
30
31
32
Vdd(3V3)
P0[29]/USB_D+
P0[30]/USB_DVss
P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]
33
P1[19]/MC0A/USB_PPWR/CAP1[1]
34
P1[20]/MCFB0/PWM1[2]/SCK0
35
P1[21]/MCABORT/PWM1[3]/SSEL0
36
P1[22]/MC0B/USB_PWRD/MAT1[0]
37
P1[23]/MCFB1/PWM1[4]/MISO0
38
P1[24]/MCFB2/PWM1[5]/MOSI0
39
P1[25]/MC1A/MAT1[1]
40
P1[26]/MC1B/PWM1[6]/CAP0[0]
41
42
43
44
Vss
Vdd(reg)(3V3)
P1[27]/CLKOUT/USB_OVRCR/CAP0[1]
P1[28]/MC2A/PCAP1[0]/MAT0[0]
45
P1[29]/MC2B/PCAP1[1]/MAT0[1]
46
P0[0]/RD1/TXD3/SDA1
47
P0[1]/TD1/RXD3/SCL1
48
P0[10]/TXD2/SDA2/MAT3[0]
49
P0[11]/RXD2/SCL2/MAT3[1]
Electrocomponents plc
Jumper option to SGND
32KHz clock on LPC module
#RESOUT
VAGND
SGND
#RESIN
32KHz clock on LPC module
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
Xtal on module
Xtal on module
3V BAT
3.3V
AN5
AN13
AN4
AN12
CNTRL_I2C_SCL
CNTRL_I2C_SDA
EVG1_GPIO42
2 link options
2 Link options - User LED1
Page 4
3 link options
3 link options
3 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
3 link options
3 link options
3 link options
3 link options
3 link options
3 link options
2 link options
2 link options
2 link options
2 link options
EVG0_GPIO40
3.3V
USB_DEV_D+
USB_DEV_DSGND
EVG5_GPIO50
EVG8_GPIO56
EVG0_GPIO40
MOTORP0H
EVG9_GPIO57
MOTORH0_ENC0
EVG10_GPIO58
EMG_TRAP
EVG11_GPIO59
MOTORP0L
EVG12_GPIO60
MOTORH1_ENC1
EVG13_GPIO61
MOTORH2_ENC2
EVG14_GPIO62
MOTORP1H
EVG15_GPIO63
MOTORP1L
EVG16_GPIO64
SGND
3.3V
EVM5_GPIO47
MOTORP2H
EVG17_GPIO65
MOTORP2L
EVG18_GPIO66
CAN0_TX
CAN0_TX_LOCAL
I2C_GEN0_SDA
CAN0_RX
CAN0_RX_LOCAL
I2C_GEN0_SCL
GPIO0
EVG6_GPIO52
GPIO1
EVG7_GPIO54
EDP-CM-LPC1768 CPU Module
50
51
52
53
P2[13]/#EINT3/I2STX_SDA
P2[12]/#EINT2/I2STX_WS
P2[11]/#EINT1/I2STX_CLK
P2[10]/#EINT0/NMI
54
55
56
Vdd(3V3)
Vss
P0[22]/RTS1/TD1
57
P0[21]/RI1/RD1
58
P0[20]/DTR1/SCL1
59
P0[19]/DSR1/SDA1
60
61
62
63
64
P0[18]/DCD1/MOSI0/MOSI
P0[17]/CTS1/MISO0/MISO
P0[15]/TXD1/SCK0/SCK
P0[16]/RXD1/SSEL0/SSEL
P2[9]/USB_CONNECT/RXD2
65
P2[8]/TD2/TXD2
66
P2[7]/RD2/RTS1
67
P2[6]/PCAP1[0]/RI1/TRACECLK
68
P2[5]/PWM1[6]/DTR1/TRACEDATA[0]
69
P2[4]/PWM1[5]/DSR1/TRACEDATA[1]
70
P2[3]/PWM1[4]/DCD1/TRACEDATA[2]
71
72
73
74
Vdd(3V3)
Vss
P2[2]/PWM1[3]/CTS1/TRACEDATA[3]
P2[1]/PWM1[2]/RXD1
75
P2[0]/PWM1[1]/TXD1
76
77
78
79
80
P0[9]/I2STX_SDA/MOSI1/MAT2[3]
P0[8]/I2STX_WS/MISO1/MAT2[2]
P0[7]/I2STX_CLK/SCK1/MAT2[1]
P0[6]/I2SRX_SDA/SSEL1/MAT2[0]
P0[5]/I2SRX_WS/TD2/CAP2[1]
81
P0[4]/I2SRX_CLK/RD2/CAP2[0]
82
83
84
85
86
87
88
89
90
91
92
93
P4[28]/RX_MCLK/MAT2[0]/TXD3
Vss
Vdd(reg)(3V3)
P4[29]/TX_MCLK/MAT2[1]/RXD3
P1[17]/ENET_MDIO
P1[16]/ENET_MDC
P1[15]/ENET_REF_CLK
P1[14]/ENET_RX_ER
P1[10]/ENET_RXD1
P1[9]/ENET_RXD0
P1[8]/ENET_CRS
P1[4]/ENET_TX_EN
Electrocomponents plc
2 link options
2 link options
2 link options
2 Link options
2 link options
2 Link options
2 link options
2 Link options
2 link options
2 Link options
Page 5
2 link options
2 link options
2 link options
2 link options
2 link options
2 link options
2 link option
2 link options User LED0
2 link option
2 link option
2 link option
2 link option
2 link option
2 link option
2 link options
2 Link options
2 link options
2 Link options
Local_SD_SPI_MOSI
Local_SD_SPI_MISO
Local_SD_SPICLK
Local_SD_CS_SD
3 link options
3 link options
3 link options
2 link option
2 Link options
USB Debug ports FTDI chip
GPIO8_MCI_DAT3
GPIO6_MCI_DAT2
GPIO4_MCI_DAT1
IRQ_GPIO16_CNTRL_I2C_INT
IRQ_GPIO18_I2C_GEN0_INT
3.3V
SGND
GPIO2_MCI_DAT0
EVM6_GPIO49
GPIO14_MCI_PWR
EVM4_GPIO45
GPIO12_MCI_CMD
EVM3_GPIO43
GPIO10_MCI_CLK
EVM2_GPIO41_CAPADC
CNTRL_SPI_MTSR
CNTRL_SPI_MRST
CNTRL_SPI_CLK
CNTRL_SPI_#CS_NSS
ASC1_RX_TTL
EVM10_GPIO68_ASCO_CTS
ASC1_TX_TTL
CAN1_TX
ASC1_TX_TTL_ASC0_DTR
CAN1_RX
MOTOR_TCO_FB
EVG4_GPIO48
EVG19_GPIO67
CPU_DAC01_GPIO19
EVG3_GPIO46
CPU_DACO0_GPIO17
EVG2_GPIO44
3.3V
SGND
EVM9_GPIO55
ASC1_RX_TTL
EVM8_GPIO53
ASC1_TX_TTL
EVM7_GPIO51
GPIO9_I2S_RX_WS
EVM1_GPIO23
CPU_DACO0_GPIO17
GPIO7_I2S_RX_CLK
EVM0_GPIO21
SGND
3.3V
USB Debug ports FTDI chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
Ethernernet PHY chip
EDP-CM-LPC1768 CPU Module
94
95
96
97
98
P1[1]/ENET_TXD1
P1[0]/ENET_TXD0
Vdd(3V3)
Vss
P0[2]/TXD0/AD0[7]
99
P0[3]/RXD0/AD0[6]
100
RTCK
Ethernernet PHY chip
Ethernernet PHY chip
3 Link options
3 link options
3 link options
3 Link options
3 link options
3 link options
JTAG interface on LPC module
2.2 Resources Used/Available by the LPC1768
The following resources are available to be used by the MCU
Resources Used/Available
3.3V
3V BAT
Vcc_CM
AN_REF
VAGND
#RESIN
#RESOUT
SGND
VAGND
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
ASC0_RX_TTL
ASC0_TX_TTL
ASC1_RX_TTL
ASC1_TX_TTL
ASC1_TX_TTL_ASC0_DTR
CAN0_RX
CAN0_TX
CAN1_RX
CAN1_TX
CAN0H
CAN0L
CNTRL_I2C_SCL
CNTRL_I2C_SDA
CNTRL_SPI_#CS_NSS
CNTRL_SPI_CLK
CNTRL_SPI_MRST
Electrocomponents plc
Page 6
3.3V
SGND
ASC0_TX_TTL
AN7
AN15
ASC0_RX_TTL
AN6
AN14
EDP-CM-LPC1768 CPU Module
CNTRL_SPI_MTSR
CPU_DACO0_GPIO17
CPU_DACO0_GPIO17
CPU_DACO1_GPIO19
EVG0_GPIO40
EVG1_GPIO42
EVG2_GPIO44
EVG3_GPIO46
EVG4_GPIO48
EVG5_GPIO50
EVG6_GPIO52
EVG7_GPIO54
EVG8_GPIO56
EVG9_GPIO57
EVG10_GPIO58
EVG11_GPIO59
EVG12_GPIO60
EVG13_GPIO61
EVG14_GPIO62
EVG15_GPIO63
EVG16_GPIO64
EVG17_GPIO65
EVG18_GPIO66
EVG19_GPIO67
EVM0_GPIO21
EVM1_GPIO23
EVM2_GPIO41_CAPADC
EVM3_GPIO43
EVM4_GPIO45
EVM5_GPIO47
EVM6_GPIO49
EVM7_GPIO51
EVM8_GPIO53
EVM9_GPIO55
EVM10_GPIO68_ASCO_CTS
GPIO0
GPIO1
GPIO7_I2S_RX_CLK
GPIO9_I2S_RX_WS
GPIO10_MCI_CLK
GPIO12_MCI_CMD
GPIO14_MCI_PWR
GPIO2_MCI_DAT0
GPIO4_MCI_DAT1
GPIO6_MCI_DAT2
GPIO8_MCI_DAT3
I2C_GEN0_SCL
I2C_GEN0_SDA
IRQ_GPIO16_CNTRL_I2C_INT
IRQ_GPIO18_I2C_GEN0_INT
MOTORP0H
MOTORP0L
MOTORP1H
MOTORP1L
MOTORP2H
MOTORP2L
MOTORH0_ENC0
MOTORH1_ENC1
MOTORH2_ENC2
EMG_TRAP
MOTOR_TCO_FB
Electrocomponents plc
Page 7
EDP-CM-LPC1768 CPU Module
USB_DEV_DUSB_DEV_D+
2.3 Alphabetical Listing of MCU pins
Pin
Alphabetic Listing of Available I/O
17
14
4
13
46
47
98
99
81
80
79
78
77
76
48
49
62
63
61
60
59
58
57
56
9
8
7
6
25
24
29
30
95
94
93
92
91
90
89
88
87
86
32
33
34
35
36
37
38
39
40
43
44
#RESET
#RSTOUT
#TRST
NC
P0[0]/RD1/TXD3/SDA1
P0[1]/TD1/RXD3/SCL1
P0[2]/TXD0/AD0[7]
P0[3]/RXD0/AD0[6]
P0[4]/I2SRX_CLK/RD2/CAP2[0]
P0[5]/I2SRX_WS/TD2/CAP2[1]
P0[6]/I2SRX_SDA/SSEL1/MAT2[0]
P0[7]/I2STX_CLK/SCK1/MAT2[1]
P0[8]/I2STX_WS/MISO1/MAT2[2]
P0[9]/I2STX_SDA/MOSI1/MAT2[3]
P0[10]/TXD2/SDA2/MAT3[0]
P0[11]/RXD2/SCL2/MAT3[1]
P0[15]/TXD1/SCK0/SCK
P0[16]/RXD1/SSEL0/SSEL
P0[17]/CTS1/MISO0/MISO
P0[18]/DCD1/MOSI0/MOSI
P0[19]/DSR1/SDA1
P0[20]/DTR1/SCL1
P0[21]/RI1/RD1
P0[22]/RTS1/TD1
P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]
P0[24]/AD0[1]/I2SRX_WS/CAP3[1]
P0[25]/AD0[2]/I2SRX_SDA/TXD3
P0[26]/AD0[3]/AOUT/RXD3
P0[27]/SDA0/USB_SDA
P0[28]/SCL0/USB_SCL
P0[29]/USB_D+
P0[30]/USB_DP1[0]/ENET_TXD0
P1[1]/ENET_TXD1
P1[4]/ENET_TX_EN
P1[8]/ENET_CRS
P1[9]/ENET_RXD0
P1[10]/ENET_RXD1
P1[14]/ENET_RX_ER
P1[15]/ENET_REF_CLK
P1[16]/ENET_MDC
P1[17]/ENET_MDIO
P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]
P1[19]/MC0A/USB_PPWR/CAP1[1]
P1[20]/MCFB0/PWM1[2]/SCK0
P1[21]/MCABORT/PWM1[3]/SSEL0
P1[22]/MC0B/USB_PWRD/MAT1[0]
P1[23]/MCFB1/PWM1[4]/MISO0
P1[24]/MCFB2/PWM1[5]/MOSI0
P1[25]/MC1A/MAT1[1]
P1[26]/MC1B/PWM1[6]/CAP0[0]
P1[27]/CLKOUT/USB_OVRCR/CAP0[1]
P1[28]/MC2A/PCAP1[0]/MAT0[0]
Electrocomponents plc
Page 8
EDP-CM-LPC1768 CPU Module
45
21
20
75
74
73
70
69
68
67
66
65
64
53
52
51
50
27
26
82
85
100
16
18
5
2
1
3
19
28
54
71
96
42
84
10
15
12
31
41
55
72
83
97
11
22
23
P1[29]/MC2B/PCAP1[1]/MAT0[1]
P1[30]/Vbus/AD0[4]
P1[31]/SCK1/AD0[5]
P2[0]/PWM1[1]/TXD1
P2[1]/PWM1[2]/RXD1
P2[2]/PWM1[3]/CTS1/TRACEDATA[3]
P2[3]/PWM1[4]/DCD1/TRACEDATA[2]
P2[4]/PWM1[5]/DSR1/TRACEDATA[1]
P2[5]/PWM1[6]/DTR1/TRACEDATA[0]
P2[6]/PCAP1[0]/RI1/TRACECLK
P2[7]/RD2/RTS1
P2[8]/TD2/TXD2
P2[9]/USB_CONNECT/RXD2
P2[10]/#EINT0/NMI
P2[11]/#EINT1/I2STX_CLK
P2[12]/#EINT2/I2STX_WS
P2[13]/#EINT3/I2STX_SDA
P3[25]/MAT0[0]/PWM1[2]
P3[26]/STCLK/MAT0[1]/PWM1[3]
P4[28]/RX_MCLK/MAT2[0]/TXD3
P4[29]/TX_MCLK/MAT2[1]/RXD3
RTCK
RTCX1
STCX2
TCK/SWDCLK
TDI
TDO/SWO
TMS/SWDIO
VBAT
Vdd(3V3)
Vdd(3V3)
Vdd(3V3)
Vdd(3V3)
Vdd(reg)(3V3)
Vdd(reg)(3V3)
Vdda
VREFN
VREFP
Vss
Vss
Vss
Vss
Vss
Vss
Vssa
XTAL1
XTAL2
2.4 Backplane Signal Names and Connections
Base Board Signal Name
#CS0
#CS1
#CS2
#CS3
#PSEN
#RD
#RESIN
#RESOUT
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EDPCON1
EDPCON2
53 & 54
55 & 56
57 & 58
59 & 60
51 & 52
45 & 46
1 &2
3&4
Page 9
Break Out
Connector
P603
P603
26
27
EDP-CM-LPC1768 CPU Module
#WR
#WRH
12V
12V
12V
12V
12V GND
12V GND
12V GND
12V GND
3.3V
3.3V
3.3V
3V BAT
5.0V
5.0V
5.0V
A0_AD0
A1_AD1
A2_AD2
A3_AD3
A4_AD4
A5_AD5
A6_AD6
A7_AD7
A8_AD8
A9_AD9
A10_AD10
A11_AD11
A12_AD12
A13_AD13
A14_AD14
A15_AD15
ALE
AN_REF
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
ASC0_RX_TTL
ASC0_TX_TTL
ASC1_RX_TTL
ASC1_RX_TTL_ASC0_DSR
ASC1_TX_TTL
ASC1_TX_TTL_ASC0_DTR
CAN0_RX
CAN0_TX
CAN1_RX
CAN1_TX
Electrocomponents plc
47 & 48
49 & 50
133
134
135
136
137
138
139
140
127
128
95 & 96
124
129
130
97 & 98
41 & 42
39 & 40
37 & 38
35 & 36
33 & 34
31 & 32
29 & 30
27 & 28
25 & 26
23 & 24
21 & 22
19 & 20
17 & 18
15 & 16
13 & 14
11 & 12
43 & 44
1
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
89
91
93
99
95
97
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
47
47
47
47
48
48
48
48
44
44
44
42
45
45
45
P601
P603
P603
P603
P603
P602
P602
P602
P602
P601
P601
P601
P601
P603
P602
P603
P602
P602
P602
P602
P602
P602
P602
6
2
6
1
5
2
4
1
3
2
4
1
3
4
6
3
5
30
31
32
35
33
34
P602
P602
46
47
61 & 62
63 &64
121
123
Page 10
EDP-CM-LPC1768 CPU Module
CANH0
CANL0
CNTRL_I2C_SCL
CNTRL_I2C_SDA
CNTRL_SPI_#CS_NSS
CNTRL_SPI_CLK
CNTRL_SPI_MRST
CNTRL_SPI_MTSR
CPU_DAC01_GPIO19
CPU_DACO0_GPIO17
EMG_TRAP
ETH_LNK_LED
ETH_RXETH_RX_LED
ETH_RX+
ETH_SPD_LED
ETH_TXETH_TX+
EVG0_GPIO40
EVG1_GPIO42
EVG2_GPIO44
EVG3_GPIO46
EVG4_GPIO48
EVG5_GPIO50
EVG6_GPIO52
EVG7_GPIO54
EVG8_GPIO56
EVG9_GPIO57
EVG10_GPIO58
EVG11_GPIO59
EVG12_GPIO60
EVG13_GPIO61
EVG14_GPIO62
EVG15_GPIO63
EVG16_GPIO64
EVG17_GPIO65
EVG18_GPIO66
EVG19_GPIO67
EVG20_GPIO69_ASCO_RTS
EVM0_GPIO21
EVM1_GPIO23
EVM2_GPIO41_CAPADC
EVM3_GPIO43
EVM4_GPIO45
EVM5_GPIO47
EVM6_GPIO49
EVM7_GPIO51
EVM8_GPIO53
EVM9_GPIO55
EVM10_GPIO68_ASCO_CTS
GPIO0
GPIO1
GPIO2_MCI_DAT0
GPIO3
GPIO4_MCI_DAT1
GPIO5_I2S_TX_WS
GPIO6_MCI_DAT2
GPIO7_I2S_RX_CLK
GPIO8_MCI_DAT3
GPIO9_I2S_RX_WS
GPIO10_MCI_CLK
Electrocomponents plc
89 & 90
91 & 92
79 & 80
77 & 78
75 & 76
69 & 70
71 & 72
73 & 74
40
38
114
111
109
113
107
115
105
103
61
63
65
67
69
71
73
75
77
78
79
80
81
82
83
84
85
86
87
88
92
42
44
62
64
66
68
70
72
74
76
90
21
22
23
24
25
26
27
28
29
30
31
P603
P603
P603
P603
P603
P603
P603
P603
P601
P603
P601
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
P603
Page 11
40
41
35
34
33
30
31
32
7
7
44
41
40
42
39
43
38
37
16
17
18
19
20
21
22
23
24
26
25
27
26
28
27
29
28
30
29
31
33
8
9
18
19
20
21
22
23
24
25
32
13
15
14
16
17
19
18
20
22
21
23
EDP-CM-LPC1768 CPU Module
GPIO11_I2S_RX_SDA
GPIO12_MCI_CMD
GPIO13_I2S_TX_CLK
GPIO14_MCI_PWR
GPIO15_I2S_TX_SDA
GPIO24_AD7
GPIO25_AD15
GPIO26_AD6
GPIO27_AD14
GPIO28_AD5
GPIO29_AD13
GPIO30_AD4
GPIO31_ADI2
GPIO32_AD3
GPIO33_AD11
GPIO34_AD2
GPIO35_AD10
GPIO36_AD1
GPIO37_AD9
GPIO38_AD0
GPIO39_AD8
I2C_GEN0_SCL
I2C_GEN0_SDA
I2C_GEN1_SCL
I2C_GEN1_SDA
IRQ_GPIO16_CNTRL_I2C_INT
IRQ_GPIO18_I2C_GEN0_INT
IRQ_GPIO20_I2C_GEN1_INT
IRQ_GPIO22_I2C_INT
MOTOR_TCO_FB
MOTORH0_ENC0
MOTORH1_ENC1
MOTORH2_ENC2
MOTORP0H
MOTORP0L
MOTORP1H
MOTORP1L
MOTORP2H
MOTORP2L
MOTORPWM
SGND
SGND
SGND
SGND
SPI_SSC_#CS_NSS
SPI_SSC_CLK
SPI_SSC_MRST_MISO
SPI_SSC_MTSR_MOSI
USB_DEBUG_DUSB_DEBUG_D+
USB_DEV_DUSB_DEV_D+
USB_HOST_DUSB_HOST_D+
VAGND
VAGND
Vcc_CM
Vcc_CM
Vcc_CM
Electrocomponents plc
32
33
34
35
36
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
7&8
5&6
119
117
37
39
41
43
122
116
118
120
102
100
106
104
110
108
112
131
132
9 & 10
99 & 100
101
98
94
96
67 & 68
65 & 66
87 & 88
85 & 86
83 & 84
81 & 82
19
20
125
126
93 & 94
P603
24
P603
P603
P603
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P602
P601
P603
P603
P602
P602
P603
P603
P603
P602
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P601
P603
P603
P603
P603
P602
P601
P601
P601
25
12
8
8
10
9
11
10
12
11
13
12
14
13
15
14
16
15
17
29
28
45
44
11
10
9
7
48
45
46
47
38
37
40
39
42
41
43
46
46
46
46
36
36
34
35
P603
P603
P603
P603
P601
P601
P603
P603
P603
39
38
37
36
5
5
43
43
43
Page 12
EDP-CM-LPC1768 CPU Module
2.5 Mapping Aids
AN0
AN8
AN1
AN9
AN2
AN10
1
3
2
1
3
2
1
3
2
AN3
AN11
CPU_DACO0_GPIO17
1
4
3
2
AN4
AN12
1
3
2
1
3
2
ASC0_RX_TTL
AN6
AN14
1
4
3
2
ASC0_TX_TTL
AN7
AN15
1
4
3
2
MOTORP0H
EVG9_GPIO57
1
3
2
MOTORP0L
EVG12_GPIO60
1
3
2
MOTORP1H
EVG15_GPIO63
1
3
2
1
3
2
MOTORP2H
EVG17_GPIO65
1
3
2
MOTORP2L
EVG18_GPIO66
1
3
EMG_TRAP
EVG11_GPIO59
1
3
2
1
3
2
1
3
2
AN5
AN13
MOTORP1L
EVG16_GPIO64
MOTORH0_ENC0
EVG10_GPIO58
MOTORH1_ENC1
EVG13_GPIO61
MOTORH2_ENC2
EVG14_GPIO62
Electrocomponents plc
1
3
JP403
9
P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]
JP402
8
P0[24]/AD0[1]/I2SRX_WS/CAP3[1]
7
P0[25]/AD0[2]/I2SRX_SDA/TXD3
JP401
JP408
6
P0[26]/AD0[3]/AOUT/RXD3
21
P1[30]/Vbus/AD0[4]
20
P1[31]/SCK1/AD0[5]
99
PO[3]/RXD0/AD0[6]
98
P0[2]/TXD0/AD0[7]
33
P1[19]/MC0A/USB_PPWR/CAP1[1]
JP405
JP404
JP440
JP439
JP409
2
2
JP412
36 2P1[22]/MC0B/USB_PWRD/MAT1[0]
JP415
39
P1[25]/MC1A/MAT1[1]
40
P1[26]/MC1B/PWM1[6]/CAP0[0]
44
P1[28]/MC2A/PCAP1[0]/MAT0[0]
45
P1[29]/MC2B/PCAP1[1]/MAT0[1]
35
P1[21]/MCABORT/PWM1[3]/SSEL0
34
P1[20]/MCFB0/PWM1[2]/SCK0
37
P1[23]/MCFB1/PWM1[4]/MISO0
JP416
JP417
JP418
JP411
JP410
JP413
JP414
38
P1[24]/MCFB2/PWM1[5]/MOSI0
Page 13
L
P
C
1
7
6
8
C
o
m
m
a
n
d
M
o
d
u
l
e
27
P3[25]/MAT0[0]/PWM1[2]
26
P3[26]/STCLK/MAT0[1]/PWM1[3]
70
P2[3]/PWM1[4]/DCD1/TRACEDATA[2]
69
P2[4]/PWM1[5]/DSR1/TRACEDATA[1]
68
P2[5]/PWM1[6]/DTR1/TRACEDATA[0]
32
P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]
48
P0[10]/TXD2/SDA2/MAT3[0]
49
P0[11]/RXD2/SCL2/MAT3[1]
73
P2[2]/PWM1[3]/CTS1/TRACEDATA[3]
81
P0[4]/I2SRX_CLK/RD2/CAP2[0]
80
P0[5]/I2SRX_WS/TD2/CAP2[1]
43
P1[27]/CLKOUT/USB_OVRCR/CAP0[1]
67
P2[6]/PCAP1[0]/RI1/TRACECLK
1
EVG0_GPIO40
3
User LED D401
JP406
2
EVG1_GPIO42
JP430
2
3
1
JP429
2
3
1
JP428
2
1
3
CPU_DACO0_GPIO17
EVG2_GPIO44
CPU_DAC01_GPIO19
EVG3_GPIO46
EVG4_GPIO48
EVG19_GPIO67
1
3
4
JP407
2
EVG5_GPIO50
EVG8_GPIO56
EVG0_GPIO40
JP421
2
1
3
GPIO0
EVG6_GPIO52
JP422
2
1
3
GPIO1
EVG7_GPIO54
EVM9_GPIO55
JP438
2
JP437
2
3
1
GPIO7_I2S_RX_CLK
EVM0_GPIO21
3
1
4
GPIO9_I2S_RX_WS
EVM1_GPIO23
CPU_DACO0_GPIO17
EVM5_GPIO47
JP427
User LED D402
MOTOR_TCO_FB
EDP-CM-LPC1768 CPU Module
3.3V
AN_REF
R101
GPIO8_MCI_DAT3
GPIO6_MCI_DAT2
GPIO4_MCI_DAT1
GPIO2_MCI_DAT0
EVM6_GPIO49
3
1
GPIO14_MCI_PWR
EVM4_GPIO45
3
1
2
3
1
2
GPIO12_MCI_CMD
EVM3_GPIO43
GPIO10_MCI_CLK
EVM2_GPIO41_CAPADC
3
2
2
56
P0[22]/RTS1/TD1
57
P0[21]/RI1/RD1
58
P0[20]/DTR1/SCL1
JP434
JP435
JP436
59
60
61
62
63
Local
SD
Card
ETH_TX_P
ETH_TX_N
ETH_RX_N
ETH_RX_P
CNTRL_I2C_SCL
CNTRL_I2C_SDA
P2[13]/#EINT3/I2STX_SDA
P2[12]/#EINT2/I2STX_WS
P2[11]/#EINT1/I2STX_CLK
JP433
CNTRL_SPI_MTSR
CNTRL_SPI_MRST
CNTRL_SPI_CLK
CNTRL_SPI_#CS_NSS
IRQ_GPIO16_CNTRL_I2C_INT
IRQ_GPIO18_I2C_GEN0_INT
50
51
52
Local
PHY
1
3
JP423
2
76
77
78
79
86
87
88
89
90
91
92
93
94
95
P0[19]/DSR1/SDA1
P0[18]/DCD1/MOSI0/MOSI
P0[17]/CTS1/MISO0/MISO
P0[15]/TXD1/SCK0/SCK
P0[16]/RXD1/SSEL0/SSEL
P0[9]/I2STX_SDA/MOSI1/MAT2[3]
P0[8]/I2STX_WS/MISO1/MAT2[2]
P0[7]/I2STX_CLK/SCK1/MAT2[1]
P0[6]/I2SRX_SDA/SSEL1/MAT2[0]
P1[17]/ENET_MDIO
P1[16]/ENET_MDC
P1[15]/ENET_REF_CLK
P1[14]/ENET_RX_ER
P1[10]/ENET_RXD1
P1[9]/ENET_RXD0
P1[8]/ENET_CRS
P1[4]/ENET_TX_EN
P1[1]/ENET_TXD1
P1[0]/ENET_TXD0
53
P2[10]/#EINT0/NMI
24
25
P0[28]/SCL0/USB_SCL
P0[27]/SDA0/USB_SDA
L
P
C
1
7
6
8
C
o
m
m
a
n
d
M
o
d
u
l
e
2
JP202
Vref
3.3V
2
JP201
Vdda
Vbat
3.3V
2
JP203
3
1
1
3
3
VBAT
1
SGND
VAGND
R102
#RESET
#RESET_OUT
3.3V
85
82
P4[29]/TX_MCLK/MAT2[1]/RXD3
P4[28]/RX_MCLK/MAT2[0]/TXD3
29
30
P0[29]/USB_D+
P0[30]/USB_D-
75
P2[0]/PWM1[1]/TXD1
74
VCC_CM
Local
Debug
FTDI
Virtual UART
Debug USB D+
Debug USB DUSB_DEV_D+
USB_DEV_D-
JP432
2
3
1
P2[1]/PWM1[2]/RXD1
JP431
2
3
ASC1_RX_TTL
1 EVM8_GPIO53
66
P2[7]/RD2/RTS1
JP426
2
1 ASC1_TX_TTL_ASC0_DTR
3
CAN1_RX
65
P2[8]/TD2/TXD2
JP425
2
1 ASC1_TX_TTL
3
CAN1_TX
64
P2[9]/USB_CONNECT/RXD2
JP424
2
1
ASC1_RX_TTL
3
EVM10_GPIO68_ASCO_CTS
46
P0[0]/RD1/TXD3/SDA1
JP419
2
47
P0[1]/TD1/RXD3/SCL1
JP420
2
ASC1_TX_TTL
EVM7_GPIO51
1 CAN0_RX
4
CAN0_RX_LOCAL
3
I2C_GEN0_SDA
1
CAN0_TX
4
CAN0_TX_LOCAL
3
I2C_GEN0_SCL
3. Solder Link Options
Many of the options for the Command Module board require a solder bridge to be made or a track to
be cut. The CM board has been designed to be configured in the most popular setting by using a
small track between the options, which will require cutting with a sharp knife before making the
alternate connection options.
The options we have are as follows:
VDDA
JP201 (1-2)
JP201 (2-3)
VDDA on the MCU is connected to 3.3V
VDDA on the MCU is connected to AN_REF on
the backplane
Vref
Electrocomponents plc
Page 14
EDP-CM-LPC1768 CPU Module
JP202 (1-2)
JP202 (2-3)
VREF on the MCU is connected to 3.3V
VREF on the MCU is connected to AN_REF on the
backplane
VBAT
JP203 (1-2)
JP203 (2-3)
VBAT on the MCU is connected to 3.3V
VREF on the MCU is connected to 3V3_BATT on
the backplane
Port P0 Options
P0[0]/RD1/TXD3/SDA1
JP419 (2-1)
JP419 (2-4) (Default)
JP419 (2-3)
CAN0_TX
CAN0_TX_LOCAL
I2C_GEN0_SDA
Position 2-1 puts the CAN logic level transmit traffic on the backplane. A physical layer CAN
transceiver on the Communications Module can translate this in to the CANH and CANL physical layer
for networking. It is possible on the Communications Module to make this CAN isolated.
Position 2-4 routes the CAN logic level transmit traffic to a local physical layer CAN transceiver on the
NXP Command Module. The output of the CAN transceiver (CANH and CANL) is routed down the
back plane to the Comms Module and output on a standard 9 way D connector.
Position 2-3 allows this pin to be used as a second I2C channel, I2C_GEN0.
P0[1]/TD1/RXD3/SCL1
JP420 (2-1)
JP420 (2-4) (Default)
JP420 (2-3)
CAN0_RX
CAN0_RX_LOCAL
I2C_GEN0_SCL
Position 2-1 routes the CAN logic level receive traffic from the backplane to the I/O pin. The traffic
usually comes from the physical layer CAN transceiver present on the Communications Module. It is
possible on the Comms Module to have an isolated CAN stream.
Position 2-4 routes the CAN logic level receive traffic from the local physical layer CAN transceiver on
the NXP Command Module.
Position 2-3 allows this pin to be used as a second I2C channel, I2C_GEN0.
P0[2]/TXD0/AD0[7]
JP439 (2-1) (Default)
ASC0_TX_TTL
JP439 (2-4)
AN7
JP439 (2-3)
AN15
Position 2-1 is the main RS232/UART channel. Outgoing logic level transmit traffic is routed to the
Communication Module where it is translated into RS232/RS485 logic levels.
P0[3]/RXD0/AD0[6]
JP440 (2-1) (Default)
ASC0_RX_TTL
JP440 (2-4)
AN6
JP440 (2-3)
AN14
Position 2-1 is the main RS232/UART channel. Incoming logic level receive traffic is routed from the
Communication Module.
P0[4]/I2SRX_CLK/RD2/CAP2[0]
Electrocomponents plc
Page 15
EDP-CM-LPC1768 CPU Module
JP438 (2-3)
JP438 (2-1) (Default)
GPIO7_I2S_RX_CLK
EVM0_GPIO21
P0[5]/I2SRX_WS/TD2/CAP2[1]
JP437 (2-3)
JP437 (2-1) (Default)
JP437 (2-4)
GPIO9_I2S_RX_WS
EVM1_GPIO23
CPU_DACO0_GPIO17
P0[10]/TXD2/SDA2/MAT3[0]
JP421 (2-1) (Default)
JP421 (2-3)
GPIO0
EVG6_GPIO52
P0[11]/RXD2/SCL2/MAT3[1]
JP422 (2-1) (Default)
JP422 (2-3)
GPIO1
EVG7_GPIO54
P0[19]/DSR1/SDA1
JP436 (2-3)
JP436 (2-1) (Default)
GPIO10_MCI_CLK
EVM2_GPIO41_CAPADC
P0[20]/DTR1/SCL1
JP435 (2-3)
JP435 (2-1) (Default)
GPIO12_MCI_CMD
EVM3_GPIO43
P0[21]/RI1/RD1
JP434 (2-3)
JP434 (2-1) (Default)
GPIO14_MCI_PWR
EVM4_GPIO45
P0[22]/RTS1/TD1
JP433 (2-3)
JP433 (2-1) (Default)
GPIO2_MCI_DAT0
EVM6_GPIO49
P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]
JP403 (2-1) (Default)
AN0
JP403 (2-3)
AN8
P0[24]/AD0[1]/I2SRX_WS/CAP3[1]
JP402 (2-1) (Default)
AN1
JP402 (2-3)
AN9
P0[25]/AD0[2]/I2SRX_SDA/TXD3
JP401 (2-1) (Default)
AN2
JP401 (2-3)
AN10
P0[26]/AD0[3]/AOUT/RXD3
JP408 (2-1) (Default)
JP408 (2-4)
JP408 (2-3)
Electrocomponents plc
AN3
AN11
CPU_DACO0_GPIO17
Page 16
EDP-CM-LPC1768 CPU Module
Port P1 Options
P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]
JP407 (2-1) (Default)
EVG5_GPIO50
JP407 (2-3)
EVG8_GPIO56
JP407 (2-4)
EVG0_GPIO40
P1[19]/MC0A/USB_PPWR/CAP1[1]
JP409 (2-1)
MOTORP0H
JP409 (2-3) (Default)
EVG9_GPIO57
P1[20]/MCFB0/PWM1[2]/SCK0
JP410 (2-1)
JP410 (2-3) (Default)
MOTORH0_ENC0
EVG10_GPIO58
P1[21]/MCABORT/PWM1[3]/SSEL0
JP411 (2-1)
EMG_TRAP
JP411 (2-3) (Default)
EVG11_GPIO59
P1[22]/MC0B/USB_PWRD/MAT1[0]
JP412 (2-1)
MOTORP0L
JP412 (2-3) (Default)
EVG12_GPIO60
P1[23]/MCFB1/PWM1[4]/MISO0
JP413 (2-1)
MOTORH1_ENC1
JP413 (2-3) (Default)
EVG13_GPIO61
P1[24]/MCFB2/PWM1[5]/MOSI0
JP414 (2-1)
MOTORH2_ENC2
JP414 (2-3) (Default)
EVG14_GPIO62
P1[25]/MC1A/MAT1[1]
JP415 (2-1)
JP415 (2-3) (Default)
MOTORP1H
EVG15_GPIO63
P1[26]/MC1B/PWM1[6]/CAP0[0]
JP416 (2-1)
MOTORP1L
JP416 (2-3) (Default)
EVG16_GPIO64
P1[28]/MC2A/PCAP1[0]/MAT0[0]
JP417 (2-1)
MOTORP2H
JP417 (2-3) (Default)
EVG17_GPIO65
P1[29]/MC2B/PCAP1[1]/MAT0[1]
JP418 (2-1)
MOTORP2L
JP418 (2-3) (Default)
EVG18_GPIO66
P1[30]/Vbus/AD0[4]
JP405 (2-1) (Default)
JP405 (2-3)
Electrocomponents plc
AN4
AN12
Page 17
EDP-CM-LPC1768 CPU Module
P1[31]/SCK1/AD0[5]
JP404 (2-1) (Default)
JP404 (2-3)
AN5
AN13
Port P2 Options
P2[0]/PWM1[1]/TXD1
JP432 (2-3)
JP432 (2-1) (Default)
ASC1_TX_TTL
EVM7_GPIO51
P2[1]/PWM1[2]/RXD1
JP431 (2-3)
JP431 (2-1) (Default)
ASC1_RX_TTL
EVM8_GPIO53
P2[3]/PWM1[4]/DCD1/TRACEDATA[2]
JP430 (2-3)
CPU_DACO0_GPIO17
JP430 (2-1) (Default)
EVG2_GPIO44
P2[4]/PWM1[5]/DSR1/TRACEDATA[1]
JP429 (2-3)
CPU_DAC01_GPIO19
JP429 (2-1) (Default)
EVG3_GPIO46
P2[5]/PWM1[6]/DTR1/TRACEDATA[0]
JP428 (2-1) (Default)
EVG4_GPIO48
JP428 (2-3)
EVG19_GPIO67
P2[6]/PCAP1[0]/RI1/TRACECLK
JP427 (2-1)
JP427 (2-3) (Default)
MOTOR_TCO_FB
User LED0
P2[7]/RD2/RTS1
JP426 (2-1) (Default)
JP426 (2-3)
ASC1_TX_TTL_ASC0_DTR
CAN1_RX
P2[8]/TD2/TXD2
JP425 (2-1) (Default)
JP425 (2-3)
ASC1_TX_TTL
CAN1_TX
P2[9]/USB_CONNECT/RXD2
JP424 (2-1) (Default)
JP424 (2-3)
ASC1_RX_TTL
EVM10_GPIO68_ASCO_CTS
P2[10]/#EINT0/NMI
JP423 (2-1) (Default)
JP423 (2-3)
IRQ_GPIO16_CNTRL_I2C_INT
IRQ_GPIO18_I2C_GEN0_INT
Port P3 Options
P3[25]/MAT0[0]/PWM1[2]
JP406 (2-1)
Electrocomponents plc
EVG0_GPIO40
Page 18
EDP-CM-LPC1768 CPU Module
JP406 (2-3) (Default)
User LED1
Selecting JP406 position 2-3 allows use of the on board user led LED1 (D401)
4. Zero Ohm Links
CAN Load Resistor
JP501
This link when inserted includes a 120 ohm resistor across CANH0 and CANL0. The
default is connected.
AN_REF
R101
This zero ohm link when inserted provides a 3.3V reference for the EDP platform.
The 3.3V used is the local supply voltage derived from a local voltage regulator.
This link should be used in the absence of a 3.3V voltage reference voltage
provided by the Analogue Module when fitted. The default position is not
connected.
AGND & VAGND
R102
This link when inserted provides a way of connecting the VAGND to the SGND. This
is the default position. The two grounds alternatively can be connected to each
other on the analogue module.
5. Software Support
The NXP Command Module for the RS-EDP platform is supported by all of the necessary software
drivers to make driving of the platform very easy. All the low level support for the devices controlled
by I2C for example have been written, as well as a test menu to exercise each of the modules
independently of the others. This therefore provides working example of the code which will allow
students and users to cut and paste various sections into their own applications.
Each Applications Module has its own header file which provides the support for the functions that
control it. Each module has its own set of high level functions that can be called to operate and
control the hardware. This makes life a lot easier for the user, who can then spend most of his time
working at the higher level application layer.
The software has been packed up as several ZIP file which can be downloaded and unpacked. Most
of the projects have been written for the Keil uVision environment.
The majority of the applications written use the serial comm. channel ASC0 for outputting data to a
terminal emulator. With this in mind a serial terminal emulation program should be used to read
traffic outputted from the RS-EDP platform. Hyper Terminal is included in windows as part of the
Windows Operating system but this does not work reliability. With this in mind it may be worth
looking at other terminal emulator especially if they are to be used with USB-RS232 converters.
The terminal emulator should be set up for
Electrocomponents plc
Page 19
EDP-CM-LPC1768 CPU Module
115,200 baud
8 data bits
no stop bit
no parity
No flow control
The default jumper options for JP439 and JP430 should be left in place to ensure serial traffic is
routed to the communication module. Always check the software to see if the baud rate has been
changed.
Some of the provided software includes...
5.1 RSEDP_Test_Suite
This software exercises the NXP LPC1768 MCU peripherals including the on board ADC, PWM output,
input capture, I2C, CAN, and I/O. The software also allows you to exercise the basic Application
Modules, which are the Communication Module, the Digital I/O Module, and the Analogue Module.
A suite of drivers and test menus are provided to fully exercise all the hardware on these boards.
5.2 MC1_Test_Suite
This is similar to the RSEDP_Test_Suite, but the test menus provided are for the MC1 Brushed DC
Motor Drive Application Module. The motors are nominally 12V brushed DC motors running in a full
H bridge configuration. The test suite allows you to accelerate the motor, change its direction, turn
the brake on and off, as well as allowing the monitoring of motor current, DC link voltage and tacho
feedback signals. The MC1 motor drive module also has many external inputs for limit switch
detection and conditioning of motor related stimuli. The provided software library will therefore
allow you to fully exercise your motor.
5.3 MC2_Test_Suite
This is similar to the MC1 test suite but for brushless DC/AC motors. The software assumes you have
an MC2 motor drive module fitted, and you want to communicate to it via I2C packets. This set of
software therefore allows you communicate with the MC2 motor drive module across the I2C
backplane network, present in the RSEDP system. You can have up to three MC2 motor drives fitted
and this suite of software allows you to communicate with all of them.
5.4 Easy Web
This piece of software allows the NXP processor to serve a web page via its on board Ethernet port.
The software allows you to effectively test the Ethernet port is working correctly. The software was
written by Andreas Dannenberg at the University of Applied Science in Germany, and has been
modified to work on the RSEDP platform.
By using these suites of software you can fully exercise the RS-EDP platform to ensure all of the items
are working correctly. You can also use the software as building blocks for your own projects.
Electrocomponents plc
Page 20
1
2
3
4
5
6
7
8
Module Position 1
EDPCON1 IO Connector
A
+3V3
COR101
R101
PIR10101
PIR10102
AN_REF
AN_REF
AN0
AN2
AN4
AN6
AN8
AN10
AN12
AN14
0R
COR102
R102
SGND
PIR10201
PIR10202
A
COP101
P101
VAGND
VAGND
0R
B
PIP10101 1
PIP10103
PIP10105
PIP10107
PIP10109
PIP101011
PIP101013
PIP101015
PIP101017
PIP101019
GPIO0
PIP101021
GPIO2_MCIDAT0
PIP101023
GPIO4_MCIDAT1
PIP101025
GPIO6_MCIDAT2
PIP101027
GPIO8_MCIDAT3
PIP101029
GPIO10_MCICLK
PIP101031
GPIO12_MCICMD
PIP101033
GPIO14_MCIPWR
PIP101035
IRQ_GPIO16_CNTRL I2C PIP101037
INT
IRQ_GPIO18_I2C GEN0 INT
PIP101039
IRQ_GPIO20_I2C GEN1 INT
PIP101041
IRQ_GPIO22_I2C INT
PIP101043
GPIO24_AD7
PIP101045
GPIO26_AD6
PIP101047
GPIO28_AD5
PIP101049
GPIO30_AD4
PIP101051
GPIO32_AD3
PIP101053
GPIO34_AD2
PIP101055
GPIO36_AD1
PIP101057
GPIO38_AD0
PIP101059
EVG0_GPIO40
PIP101061
EVG1_GPIO42
PIP101063
EVG2_GPIO44
PIP101065
EVG3_GPIO46
PIP101067
EVG4_GPIO48
PIP101069
EVG5_GPIO50
PIP101071
EVG6_GPIO52
PIP101073
EVG7_GPIO54
PIP101075
EVG8_GPIO56
PIP101077
EVG10_GPIO58
PIP101079
EVG12_GPIO60
PIP101081
EVG14_GPIO62
PIP101083
EVG16_GPIO64
PIP101085
EVG18_GPIO66
PIP101087
ASC0 RX TTL
ASC0 TX TTL
ASC1 RX TTL
ASC1 TX TTL
ETHERNET..
POETHERNET00
ETH TX_P
ETH TX_N
ETH RX_P
ETH RX_N
ETH LNK LED
ETH RX LED
ETH SPD LED
C
PIP101089
PIP101091
PIP101093
PIP101095
ASC1 TX TTL_ASC0 DTRPIP101097
ASC1 RX TTL_ASC0 DSRPIP101099
SPI_SSC #CS_NSS
PIP1010101
PIP1010103
PIP1010105
PIP1010107
PIP1010109
PIP1010111
PIP1010113
PIP1010115
I2C GEN1 SDA
I2C GEN1 SCL
PIP1010117
PIP1010119
CAN1 RX
CAN1 TX
PIP1010121
PIP1010123
(VCC_CM)+3V3
+3V3
+5V
SGND
+12V
+12V
12VGND
12VGND
PIP1010125
PIP1010127
PIP1010129
PIP1010131
PIP1010133
PIP1010135
PIP1010137
PIP1010139
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
PIP10102
PIP10104
PIP10106
PIP10108
PIP101010
PIP101012
PIP101014
PIP101016
PIP101018
AN1
AN3
AN5
AN7
AN9
AN11
AN13
AN15
PIP101020
GPIO1
GPIO3
GPIO5_I2STX_WS
GPIO7_I2SRX_CLK
PIP101028
GPIO9_I2SRX_WS
PIP101030
GPIO11_I2SRX_SDA
PIP101032
GPIO13_I2STX_CLK
PIP101034
GPIO15_I2STX_SDA
PIP101036
CPU DACO0_GPIO17
PIP101038
CPU DACO1_GPIO19
PIP101040
EVM0_GPIO21
PIP101042
EVM1_GPIO23
PIP101044
GPIO25_AD15
PIP101046
GPIO27_AD14
PIP101048
GPIO29_AD13
PIP101050
GPIO31_AD12
PIP101052
GPIO33_AD11
PIP101054
GPIO35_AD10
PIP101056
GPIO37_AD9
PIP101058
GPIO39_AD8
PIP101060
EVM2_GPIO41_CAPADC
PIP101062
EVM3_GPIO43
PIP101064
EVM4_GPIO45
PIP101066
EVM5_GPIO47
PIP101068
EVM6_GPIO49
PIP101070
EVM7_GPIO51
PIP101072
EVM8_GPIO53
PIP101074
EVM9_GPIO55
PIP101076
EVG9_GPIO57
PIP101078
EVG11_GPIO59
PIP101080
EVG13_GPIO61
PIP101082
EVG15_GPIO63
PIP101084
EVG17_GPIO65
PIP101086
EVG19_GPIO67
PIP101088
EVM10_GPIO68_ASC0
CTS
PIP101090
EVG20_GPIO69_ASC0 RTS
PIP101092
SPI_SSC MRST_MISO
PIP101094
SPI_SSC MTSR_MOSI
PIP101096
SPI_SSC CLK
PIP101098
MOTOR P0L
PIP1010100
MOTOR P0H
PIP1010102
MOTOR P1L
PIP1010104
MOTOR P1H
PIP1010106
MOTOR P2L
PIP1010108
MOTOR P2H
PIP1010110
MOTOR PWM
PIP1010112
EMG TRP
PIP1010114
MOTOR H0_ENC0
PIP1010116
MOTOR H1_ENC1
PIP1010118
MOTOR H2_ENC2
PIP1010120
MOTOR TCO FB
PIP1010122
VAGND
PIP101022
PIP101024
EDPCON2 Bus/Control Connector
PIP101026
+3V3BAT
+3V3 (VCC_CM)
+3V3
+5V
SGND
+12V
+12V
12VGND
12VGND
PIP1010124
PIP1010126
PIP1010128
PIP1010130
PIP1010132
PIP1010134
PIP1010136
PIP1010138
PIP1010140
COP102
P102
#RESIN
#RESOUT
I2C GEN0 SDA
I2C GEN0 SCL
SGND
(VCC_CM)+3V3
+3V3
+5V
SGND
PIP10201
PIP10203
PIP10205
PIP10207
PIP10209
A15_AD15
A14_AD14
A13_AD13
A12_AD12
A11_AD11
A10_AD10
A9_AD9
A8_AD8
A7_AD7
A6_AD6
A5_AD5
A4_AD4
A3_AD3
A2_AD2
A1_AD1
A0_AD0
ALE
#RD
#WR
#WRH
#PSEN
#CS0
#CS1
#CS2
#CS3
CAN0 RX
CAN0 TX
USB DEBUG D+
USB DEBUG DCNTRL SPI CLK
CNTRL SPI MRST
CNTRL SPI MTSR
CNTRL SPI #CS_NSS
CNTRL I2C SDA
CNTRL I2C SCL
USB HOST D+
USB HOST DUSB DEV D+
USB DEV DCANH0
CANL0
PIP102011
PIP102013
PIP102015
PIP102017
PIP102019
PIP102021
PIP102023
PIP102025
PIP102027
PIP102029
PIP102031
PIP102033
PIP102035
PIP102037
PIP102039
PIP102041
PIP102043
PIP102045
PIP102047
PIP102049
PIP102051
PIP102053
PIP102055
PIP102057
PIP102059
PIP102061
PIP102063
PIP102065
PIP102067
PIP102069
PIP102071
PIP102073
PIP102075
PIP102077
PIP102079
PIP102081
PIP102083
PIP102085
PIP102087
PIP102089
PIP102091
PIP102093
PIP102095
PIP102097
PIP102099
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
PIP10202
PIP10204
PIP10206
PIP10208
PIP102010
SGND
PIP102012
PIP102014
PIP102016
PIP102018
B
PIP102020
PIP102022
PIP102024
PIP102026
PIP102028
PIP102030
PIP102032
PIP102034
PIP102036
PIP102038
PIP102040
PIP102042
PIP102044
PIP102046
PIP102048
PIP102050
PIP102052
PIP102054
PIP102056
PIP102058
PIP102060
PIP102062
PIP102064
PIP102066
PIP102068
PIP102070
PIP102072
C
PIP102074
PIP102076
PIP102078
PIP102080
PIP102082
PIP102084
PIP102086
PIP102088
PIP102090
PIP102092
PIP102094
PIP102096
PIP102098
PIP1020100
+3V3 (VCC_CM)
+3V3
+5V
SGND
Tyco Amp 100 Way
Tyco Amp 140 Way
D
D
Checked By:
Title:
Module Connectors
Size:
Approved By:
1
2
3
4
5
Number:
Revision:
A3
EDP-CM-LPCx
B
Date: 07/04/2010
(c) Hitex (UK) Ltd.
Sheet1
of 5
File: D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Module Connectors.SchDoc
6
7
Hitex (UK) Ltd.
Sir William Lyons Road
University of Warwick Science Park
Coventry
Author: A.Davison
8
2
3
4
+3V3
5
+3V3
COJP201
JP201
1 PIJP20101
PIJP20202
Solderlink
2
2
PIJP20102
COJP203
JP203
1 PIJP20301
PIJP20203 3 AN_REF
6
7
8
+3V3BAT
+3V3
COJP202
JP202
1 PIJP20201
PIJP20103 3 AN_REF
PIJP20303 3
PIJP20302
Solderlink
2
1
Solderlink
A
A
+3V3
CNTRL I2C SDA
CNTRL I2C SCL
USB DEV D+
USB DEV D-
P1_0 (ENET_TXD0) PIU201095
95
P1_1 (ENET_TXD1) PIU201094
94
P1_4 (ENET_TX_EN) PIU201093
93
P1_8 (ENET_CRS)
92
PIU201092
P1_9 (ENET_RXD0) PIU201091
91
P1_10 (ENET_RXD1) PIU201090
90
P1_14 (ENET_RX_ER) PIU201089
89
P1_15 (ENET_REF_CLK)PIU201088
88
P1_16 (ENET_MDC)
87
PIU201087
P1_17 (ENET_MDIO) PIU201086
86
P1_18/PIO1_10
32
PIU201032
P1_19/PIO3_0
33
PIU201033
P1_20/PIO3_1
34
PIU201034
P1_21/PIO2_3
35
PIU201035
P1_22/PIO3_2
36
PIU201036
P1_23/PIO3_3
37
PIU201037
P1_24
38
PIU201038
P1_25
39
PIU201039
P1_26
40
PIU201040
EVM5_GPIO47
43
PIU201043
P1_28/PIO0_2
44
PIU201044
P1_29/PIO0_8
45
PIU201045
P1_30/PIO1_11
21
PIU201021
P1_31
20
PIU201020
C
19
VBAT
12
VREF
28
54
71
96
VDD(3V3)
VDD(3V3)
VDD(3V3)
VDD(3V3)
VDD(DCDC)(3V3)
VDD(DCDC)(3V3)
VDD(DCDC)(3V3)
VDDA
P3[25]/MAT0[0]/PWM1[2]
P3[26]/MAT0[1]/PWM1[3]
P4[28]/MAT2[0]/TXD3
P4[29]/MAT2[1]/RXD3
EVM9_GPIO55
Only populate with
LPC1768 and LPC2368
P2_3/PIO2_9
P2_4/PIO2_10
P2_5/PIO2_2
P2_6
P2_7/PIO2_1
P2_8
P2_9
P2_10
+3V3
PIR21 02
PIR21 01
GPIO4_MCIDAT1
GPIO6_MCIDAT2
GPIO8_MCIDAT3
27
26
PIR20902
82
PIU201082
PIR20901
TRST
TDI
TMS
TCK
RTCK
TDO
P1[0]/ENET_TXD0
P1[1]/ENET_TXD1
P1[4]/ENET_TX_EN
P1[8]/ENET_CRS
P1[9]/ENET_RXD0
P1[10]/ENET_RXD1
P1[14]/ENET_RX_ER
P1[15]/ENET_REF_CLK/ENET_RX_CLK
P1[16]/ENET_MDC
P1[17]/ENET_MDIO
P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]
P1[19]/CAP1[1]
P1[20]/PWM1[2]/SCK0
P1[21]/PWM1[3]/SSEL0
P1[22]/MAT1[0]
P1[23]/PWM1[4]/MISO0
P1[24]/PWM1[5]/MOSI0
P1[25]/MAT1[1]
P1[26]/PWM1[6]/CAP0[0]
P1[27]/CAP0[1]
P1[28]/PCAP1[0]/MAT0[0]
P1[29]/PCAP1[1]/MAT0[1]
P1[30]/VBUS/AD0[4]
P1[31]/SCK1/AD0[5]
16
PIU201016
PIY2012
PIR20202
COR201
R201
10K
PIR20101
PIR20302
COR202
R202
10K
PIR20201
PIR203 1
PIR204 1
COR204
R204
10K
RTCX2
18
PIU201018
PIY201
PIC20201 PIC20202
COP201
P201
1
3
5
7
9
11
13
#RESIN PIP201015
15
PIP201017 17
PIP201019 19
PIP20101
SGND
SGND
PIR20502
PIR20602
COR205
R205
PIR20702
COR206
R206
10K
10K
PIR20501
B
PIR20402
COR203
R203
10K
#TRST PIP20103
TDI
PIP20105
TMS/SWDIO
PIP20107
TCK/SWCLK
PIP20109
RTCK PIP201011
TDO/SWO
PIP201013
22pF
COY201
Y201
CX8V-T1A 32.768kHz
32.768KHz C202
COC202
PIP20204
+3V3
#RESIN
PIC20101 PIC20102
PIP20202
SGND
+3V3
COC201
C201
RTCX1
2
4
Header 2X2
PIR20102
COR209
R209
10K
85
PIU201085
4
#TRST
PIU20104
2
TDI
PIU20102
3
TMS/SWDIO
PIU20103
5
TCK/SWCLK
PIU20105
100
RTCK
PIU2010100
1
TDO/SWO
PIU20101
+3V3
COP202
P202
USB DEBUG D+PIP20201
1
USB DEBUG D-PIP20203
3
EVG1_GPIO42
PIU201026
COR211
R211
10K
P2_10
Only with
LPC1768
LPC2368
+3V3
P3_25/PIO0_1
PIU201027
2
P0_19/PIO2_7
P0_20/PIO2_4
P0_21/PIO1_8
P0_22/PIO2_5
P0_23/PIO1_4
P0_24
P0_25
P0_26
P2_0/PIO2_8
P2_1/PIO0_6
1
B
COU201
U201
75
P2[0]/PWM1[1]/TXD1/TRACECLK PIU201075
74
P2[1]/PWM1[2]/RXD1/PIPESTAT0 PIU201074
73
PIU201073
P2[2]/PWM1[3]/CTS1/PIPESTAT1
70
P2[3]/PWM1[4]/DCD1/PIPESTAT2 PIU201070
69
P2[4]/PWM1[5]/DSR1/TRACESYNC PIU201069
68
P2[5]/PWM1[6]/DTR1/TRACEPKT0 PIU201068
67
P2[6]/PCAP1[0]/RI1/TRACEPKT1 PIU201067
66
P2[7]/RD2/RTS1/TRACEPKT2 PIU201066
65
P2[8]/TD2/TXD2/TRACEPKT3 PIU201065
64
P2[9]/USB_CONNECT/RXD2/EXTIN0 PIU201064
53
P2[10]/EINT0 PIU201053
52
P2[11]/EINT1/MCIDAT1/I2STX_CLK PIU201052
51
P2[12]/EINT2/MCIDAT2/I2STX_WS PIU201051
50
P2[13]/EINT3/MCIDAT3/I2STX_SDA PIU201050
PIR20601
2X10 Header
PIR20802
COR207
R207
10K
PIR20701
2 PIP20102
4 PIP20104
6 PIP20106
8 PIP20108
10 PIP201010
12 PIP201012
14 PIP201014
16 PIP201016
18 PIP201018
20 PIP201020
COR208
R208
10K
JTAG
PIR20801
SGND
SGND
SGND
22pF
XTAL1
22
PIU201022
XTAL1
COY202
Y202
PIY20 3
23
XTAL2
XTAL2 PIU201023
Only Populate for LPC1768
Or LPC2368
Not Fitted
+3V3
CSTCE12M0G55
12MHz
2
PIY20202
SGND
3
CNTRL SPI CLK
CNTRL SPI #CS_NSS
CNTRL SPI MRST
CNTRL SPI MTSR
PIU201 9
1
PIP20303 3
PIP20305 5
PIP20307 7
PIP20309 9
PIY20 1
+3V3
PIR210 2
15
31
41
55
72
83
97
11
PIU201 PIU201 5 PIU2013 PIU2014 PIU2015 PIU2017 PIU20183 PIU20197
RESET
RSTOUT
PIU201017
PIR210 1
+3V3
LPC2368FBD100 - LPC1768FBD100
TMS/SWDIO
2 PIP20302
TCK/SWCLK
4 PIP20304
TDO/SWO
6 PIP20306
TDI
8 PIP20308
#RESIN
10 PIP203010
Header 5X2
R210
COR210
10K_opt
#RESIN
17
#RESOUT
14
PIU201014
C
COP203
P203
PIP20301
1
P0_10/PIO2_0
P0_11/PIO2_11
VSSA
/CS_SD
SPI_SCK1
SPI_MISO1
SPI_MOSI1
P0[0]/RD1/TXD3/SDA1
47
PIU201047 P0[1]/TD1/RXD3/SCL1
98
PIU201098 P0[2]/TXD0
99
PIU201099 P0[3]/RXD0
81
PIU201081
P0[4]/I2SRX_CLK/RD2/CAP2[0]
80
PIU201080 P0[5]/I2SRX_WS/TD2/CAP2[1]
79
PIU201079 P0[6]/I2SRX_SDA/SSEL1/MAT2[0]
78
PIU201078 P0[7]/I2STX_CLK/SCK1/MAT2[1]
77
PIU201077 P0[8]/I2STX_WS/MISO1/MAT2[2]
76
PIU201076 P0[9]/I2STX_SDA/MOSI1/MAT2[3]
48
PIU201048
P0[10]/TXD2/SDA2/MAT3[0]
49
PIU201049
P0[11]/RXD2/SCL2/MAT3[1]
62
PIU201062 P0[15]/TXD1/SCK0/SCK
63
PIU201063 P0[16]/RXD1/SSEL0/SSEL
61
PIU201061
P0[17]/CTS1/MISO0/MISO
60
PIU201060 P0[18]/DCD1/MOSI0/MOSI
59
PIU201059 P0[19]/DSR1/MCICLK/SDA1
58
PIU201058 P0[20]/DTR1/MCICMD/SCL1
57
PIU201057
P0[21]/RI1/MCIPWR/RD1
56
PIU201056 P0[22]/RTS1/MCIDAT0/TD1
9
PIU20109 P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]
8
PIU20108
P0[24]/AD0[1]/I2SRX_WS/CAP3[1]
7
PIU20107
P0[25]/AD0[2]/I2SRX_SDA/TXD3
6
PIU20106 P0[26]/AD0[3]/AOUT/RXD3
25
PIU201025 P0[27]/SDA0
24
PIU201024 P0[28]/SCL0
29
PIU201029 P0[29]/USB_D+
30
PIU201030 P0[30]/USB_D-
VSS
VSS
VSS
VSS
VSS
VSS
VSS
46
PIU201046
13
42
84
PIU201 3 PIU2014 PIU20184 PIU201 8 PIU20154 PIU2017 PIU20196 PIU201 2
10
PIU201
P0_0
P0_1
P0_2/PIO1_7
P0_3/PIO1_6
P0_4/PIO0_3
P0_5/PIO1_9
SGND
COU202
U202
2
PIU20202 VDD
PIC21 02
PIC21 01
C211
COC211
100nF
#RESIN
VAGND
1
PIU20201
3
PIU20203
SGND
SGND
RST
VSS
MCP120T-300I/TT
+3V3
PIC20302
PIC203 1
C203
COC203
100nF
PIC20402
PIC204 1
C204
COC204
100nF
PIC20502
PIC205 1
PIC20602
C205
COC205
PIC206 1
100nF
C206
COC206
100nF
PIC20702
PIC207 1
C207
COC207
100nF
PIC20802
PIC208 1
C208
COC208
100nF
PIC20902
PIC209 1
C209
COC209
100nF
PIC210 2
PIC210 1
C210
COC210
100nF
D
D
SGND
Checked By:
Title:
Hitex (UK) Ltd.
Sir William Lyons Road
University of Warwick Science Park
Coventry
LPC2368 and JTAG
Size:
Approved By:
1
2
3
4
5
Number:
Revision:
A3
EDP-CM-LPCx
B
Date: 07/04/2010
(c) Hitex (UK) Ltd.
Sheet2
of 5
File: D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\LPC2368.SchDoc
6
Author: A.Davison
7
8
1
2
3
4
5
6
7
8
+3V3
PIC30102
A
PIC301
COC301
C301
100nF
PIC30202
PIC30201
COC302
C302
100nF
A
SGND
+3V3
+3V3
PIU301 8
PIU3014
CNTRL I2C SCL
CNTRL I2C SDA
P2_1/PIO0_6
EVM9_GPIO55
TDO/SWO
COR301
R301
PIR30101
PIR30102
0R
COR302
TMS/SWDIOPIR30201R302PIR30202
0R
COR303
R303
TDO/SWO PIR30301
PIR30302
0R
COR304
R304
TMS/SWDIO
B
PIR30401
0R
PIR30402
P1_29/PIO0_8
PIO0_9
TCK/SWCLK
TDI
PIO1_0
PIO1_1
#TRST
PIO1_3
P0_23/PIO1_4
EVM5_GPIO47
33
34
PIU301034
35
PIU301035
39
PIU301039
40
PIU301040
45
PIU301045
46
PIU301046
47
PIU301047
9
PIU30109
17
PIU301017
30
PIU301030
42
PIU301042
TMS/PIO1_0/AD1/CT32B1_CAP0
TDO/PIO1_1/AD2/CT32B1_MAT0
TRST/PIO1_2/AD3/CT32B1_MAT1
SWDIO/PIO1_3/AD4/CT32B1_MAT2
PIO1_4/AD5/CT32B1_MAT3/WAKEUP
PIO1_5/RTS/CT32B0_CAP0
PIO1_6/RXD/CT32B0_MAT0
PIO1_7/TXD/CT32B0_MAT1
PIO1_8/CT16B1_CAP0
PIO1_9/CT16B1_MAT0
PIO1_10/AD6/CT16B1_MAT1
PIO1_11/AD7
PIU301033
44
2
PIO2_0/DTR PIU30102
13
PIO2_1/DSR PIU301013
26
PIO2_2/DCD PIU301026
38
PIO2_3/RI PIU301038
18
PIO2_4 PIU301018
21
PIO2_5 PIU301021
1
PIO2_6 PIU30101
11
PIO2_7 PIU301011
12
PIO2_8 PIU301012
24
PIO2_9 PIU301024
25
PIO2_10 PIU301025
31
PIO2_11/SCK PIU301031
P0_10/PIO2_0
P2_7/PIO2_1
P2_5/PIO2_2
P1_21/PIO2_3
P0_20/PIO2_4
P0_22/PIO2_5
36
37
PIU301037
43
PIU301043
48
PIU301048
P1_19/PIO3_0
P1_20/PIO3_1
P1_22/PIO3_2
P1_23/PIO3_3
PIO3_0
PIO3_1
PIO3_2
PIO3_3
EVG1_GPIO42
P0_19/PIO2_7
P2_0/PIO2_8
P2_3/PIO2_9
P2_4/PIO2_10
P0_11/PIO2_11
PIU301036
6
XTALIN PIU30106
XTAL1
7
PIU30107
XTAL2
B
XTAL MUST BE POSITIONED CLOSE TO BOTH U201 AND U301
XTALOUT
PIU3015
PIU3014
5
P0_3/PIO1_6
P0_2/PIO1_7
P0_21/PIO1_8
P0_5/PIO1_9
P1_18/PIO1_10
P1_30/PIO1_11
RESET/PIO0_0
PIO0_1/CLKOUT/CT32B0_MAT2/USB_FTOGGLE
PIO0_2/SSEL/CT16B0_CAP0
PIO0_3/USB_VBUS
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/USB_CONNECT/SCK
PIO0_7/CTS
PIO0_8/MISO/CT16B0_MAT0
PIO0_9/MOSI/CT16B0_MAT1/SWO
SWCLK/PIO0_10/SCK/CT16B0_MAT2
TDI/PIO0_11/AD0/CT32B0_MAT3
COU301
U301
VDD(3V3)
P3_25/PIO0_1
P1_28/PIO0_2
P0_4/PIO0_3
3
PIU30103
4
PIU30104
10
PIU301010
14
PIU301014
15
PIU301015
16
PIU301016
22
PIU301022
23
PIU301023
27
PIU301027
28
PIU301028
29
PIU301029
32
PIU301032
VSS
PIR30501
#RESIN
SGND
USB_DM
USB_DP
19
20
PIU301019
PIU301020
USB DEV DUSB DEV D+
LPC1343FBD48
41
P3_25/PIO0_1
COR305
R305
10K
VSSIO
PIR30502
VDDIO
8
+3V3
SGND
C
C
D
D
Checked By:
Title:
Hitex (UK) Ltd.
Sir William Lyons Road
University of Warwick Science Park
Coventry
LPC1343
Size:
Approved By:
1
2
3
4
5
Number:
Revision:
A3
EDP-CM-LPC
B
Date: 07/04/2010
(c) Hitex (UK) Ltd.
Sheet3
of 5
File: D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\LPC1343.SchDoc
6
Author: A.Davison
7
8
4
2 PIJP40802
P1_19/PIO3_0
2 PIJP40902
Solderlink
P1_28/PIO0_2
2 PIJP41702
PIJP40903
CPU DACO0_GPIO17
EVG9_GPIO57
8
1
EVM6_GPIO49
PIJP42501
COJP417
JP417
P2_8
Solderlink
2 PIJP42502
PIJP41703
3
3
PIJP41701
COJP409
JP409
7
ASC1 TX TTL
MOTOR P2H
PIJP40901
PIJP40803
6
1
COJP408
JP408
Solderlink
AN11
PIJP40804 4
PIJP43 01
COJP425
JP425
P0_22/PIO2_5
Solderlink
2 PIJP43302
PIJP42503
EVG17_GPIO65
3
P0_26
MOTOR P0H
1
1
AN3
PIJP40801
5
1
3
COJP433
JP433
Solderlink
PIJP43 03
CAN1 TX
GPIO2_MCIDAT0
3
2
3
1
A
A
2 PIJP41102
P0_0
3
AN9
2 PIJP41902
COJP419
JP419
1
COJP434
JP434
Solderlink
GPIO14_MCIPWR
CAN0_RX_LOCAL
P2_6
2 PIJP42702
EVM3_GPIO43
+3V3
1
PIJP41904 4
3
CAN1 RX
PIJP42701
PIJP41903
Solderlink
EVG11_GPIO59
2 PIJP43402
MOTOR TCO FB
1
Solderlink
PIJP41103
P0_21/PIO1_8
PIJP43403
CAN0 RX
1
1
P1_21/PIO2_3
Solderlink
3
EVG18_GPIO66
PIJP41901
COJP411
JP411
PIJP43401
COJP426
JP426
Solderlink
PIJP42603
EMG TRP
PIJP40203
2 PIJP42602
COJP427
JP427
I2C GEN0 SDA
LED0
PIR403 1
PIJP43501
+3V3
PIR403 2
Solderlink
PIJP42703
1
EVG10_GPIO58
PIJP41 01
COJP402
JP402
P2_7/PIO2_1
P0_20/PIO2_4
COR403
R403
10K
2 PIJP43502
PIQ40203
COJP435
JP435
Solderlink
PIJP43503
COQ402
Q402
BC848C
1PIQ40201
3
3
3
AN10
PIJP42601
COJP418
JP418
Solderlink
PIJP41803
AN1
2 PIJP40202
2 PIJP41802
PIJP41003
PIJP40201
P0_24
P1_29/PIO0_8
3
PIJP40103
PIJP41801
COJP410
JP410
Solderlink
3
2 PIJP41002
3
P1_20/PIO3_1
Solderlink
EVM4_GPIO45
1
1
PIJP410 1
COJP401
JP401
3
2 PIJP40102
ASC1 TX TTL_ASC0 DTR
3
PIJP40101
P0_25
MOTOR P2L
1
MOTOR H0_ENC0
1
AN2
GPIO12_MCICMD
2
PIQ40202
PIR40 2
COR404
R404
2 PIJP41202
2 PIJP42002
COJP420
JP420
Solderlink PIJP420 3
EVG12_GPIO60
3
3
AN8
PIJP42004 4
CAN0_TX_LOCAL
P2_5/PIO2_2
2 PIJP42802
PIJP42803
I2C GEN0 SCL
EVG19_GPIO67
330R
PID4021
PID402
EVM2_GPIO41_CAPADC
1
1
1
P0_1
PIJP41203
COJP428
JP428
Solderlink
PIJP43601
COD402
D402
LED YELLOW
P0_19/PIO2_7
2 PIJP43602
COJP436
JP436
Solderlink
B
PIJP43603
3
P1_22/PIO3_2
Solderlink
PIJP40303
PIJP42801
PIR40401
GPIO10_MCICLK
1
2 PIJP40302
PIJP420 1
COJP412
JP412
Solderlink
3
P0_23/PIO1_4
PIJP41201
COJP403
JP403
EVG4_GPIO48
3
PIJP40301
B
CAN0 TX
1
MOTOR P0L
1
AN0
COJP437
JP437
Solderlink
PIJP437044 CPU DACO0_GPIO17
SGND
3
AN12
GPIO9_I2SRX_WS
EVM0_GPIO21
1
EVG2_GPIO44
PIJP430 1
P2_3/PIO2_9
PIJP43801
COJP430
JP430
2 PIJP43002
Solderlink
PIJP42 03
EVG14_GPIO62
PIJP43703
CPU DACO1_GPIO19
1
GPIO1
P0_11/PIO2_11
2 PIJP43702
3
EVG6_GPIO52
COJP422
JP422
2 PIJP42202
Solderlink
PIJP41403
P0_5/PIO1_9
Solderlink
PIJP42903
PIJP42 01
COJP414
JP414
Solderlink
2 PIJP41402
2 PIJP42902
PIJP43701
COJP429
JP429
P0_4/PIO0_3
COJP438
JP438
2 PIJP43802
Solderlink
PIJP430 3
EVG7_GPIO54
PIJP43803
CPU DACO0_GPIO17
3
EVG13_GPIO61
1
P1_24
Solderlink
PIJP40503
P2_4/PIO2_10
Solderlink
PIJP42103
PIJP41401
3
1
1
2 PIJP42102
MOTOR H2_ENC2
1
AN4
COJP405
JP405
2 PIJP40502
P0_10/PIO2_0
3
3
3
AN13
PIJP40501
P1_30/PIO1_11
Solderlink
PIJP41303
3
2 PIJP41302
EVM1_GPIO23
PIJP42901
COJP421
JP421
3
P1_23/PIO3_3
Solderlink
PIJP40403
EVG3_GPIO46
PIJP42101
COJP413
JP413
1
2 PIJP40402
PIJP41301
COJP404
JP404
3
P1_31
GPIO0
1
MOTOR H1_ENC1
1
AN5
PIJP40401
GPIO7_I2SRX_CLK
C
C
PIJP41501
+3V3
PIR40102
P1_25
PIR40101
1
1
PIJP43101
COJP423
JP423
Solderlink
2 PIJP42302
P2_1/PIO0_6
PIJP43901
COJP431
JP431
Solderlink
2 PIJP43102
P0_2/PIO1_7
2 PIJP43902
JP439
COJP439
Solderlink
AN7
4
PIJP43904
1PIQ40101
PIQ401 3COQ401
PIJP41503
Q401
BC848C
PIJP42303
EVG15_GPIO63
PIJP43103
IRQ_GPIO18_I2C GEN0 INT
PIJP43903
ASC1 RX TTL
AN15
3
3
LED1
P2_10
3
10K
PIJP40603
PIJP42301
COJP415
JP415
Solderlink
2 PIJP41502
3
COR401
R401
ASC0 TX TTL
EVM8_GPIO53
3
Solderlink
3
COJP406
JP406
2 PIJP40602
IRQ_GPIO16_CNTRL I2C INT
1
1
+3V3
PIJP40601
P3_25/PIO0_1
MOTOR P1H
1
EVG0_GPIO40
2
PIQ401 2
PIR402
R402
COR402
PIJP40702
PIJP40704
4 EVG0_GPIO40
3
PIJP40703
EVG8_GPIO56
2
LED YELLOW
PIJP41602
P2_9
PIJP41603
2
PIJP42402
PIJP43201
COJP424
JP424
Solderlink
P2_0/PIO2_8
2
PIJP43202
PIJP42403
EVG16_GPIO64
1
1
1
1
P1_26
D401
COD401
ASC0 RX TTL
EVM7_GPIO51
PIJP42401
COJP416
JP416
Solderlink
PIJP43203
EVM10_GPIO68_ASC0 CTS
PIJP4 0 1
COJP432
JP432
Solderlink
P0_3/PIO1_6
2
PIJP44002
JP440
COJP440
Solderlink
AN6
4
PIJP44004
PIJP4 0 3
ASC1 TX TTL
3
2
ASC1 RX TTL
MOTOR P1L
PIJP41601
3
P1_18/PIO1_10
330R
PID401
PID4012
3
PIJP40701 Solderlink
PIR402 1
3
1
EVG5_GPIO50
JP407
COJP407
AN14
SGND
D
D
Checked By:
Title:
Hitex (UK) Ltd.
Sir William Lyons Road
University of Warwick Science Park
Coventry
Link Options
Size:
Approved By:
1
2
3
4
5
Number:
Revision:
A3
EDP-CM-LPC
B
Date: 07/04/2010
(c) Hitex (UK) Ltd.
Sheet4
of 5
File: D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Jumpers.SchDoc
6
Author: A.Davison
7
8
1
2
3
4
5
+3V3
6
7
8
+3V3
+3V3
PIC50102
COR501
R501
PIR50102
PIR50101
PIC509 2
2K2
COR502
R502
PIR50202
PIC50901
PIR50201
2K2
TX_EN
TXD_0
4
PIU50104
TXD_1
5
PIU50105
6
PIU50106
P1_9 (ENET_RXD0)
P1_10 (ENET_RXD1)
TXD_2
TXD_3
43
PIU501043
RXD_0
44
RXD_1
RXD_2
46
PIU501046
RXD_3
41
PIU501041 RX_ER
39
PIU501039 RX_DV
38
PIU501038 RX_CLK
42
PIU501042
COL
40
PIU501040 CRS/CRS_DV
PIU501044
45
PIU501045
P1_14 (ENET_RX_ER)
COR505
R505
+3V3
PIR50502
PIR50501
2K2
(ENET_CRS)
P1_8
P1_16 (ENET_MDC)
P1_17 (ENET_MDIO)
P1_15 (ENET_REF_CLK)
48
32
RESET_N
31
PIU501031
MDC
30
MDIO
25
PIU501025 25MHz_OUT
PIC50601
COC506
C506
PIC50702
COC507
C507
10uF 10V PIC50701 100nF
24
PIU501024
PIR50902
RBIAS
COR509
R509
PIR50901
SGND
4K87 1%
PIU501 PIU501 9 PIU5013 PIU50147 PIU50136
A
1
TriState
OUTPUT
PIY50101
2
PIY50102
GND
SGND
50.000MHZ XO53050UITA
33
PIU501033
34
PIU501034
29
PIU501029
+3V3
PIR50402
COR503
R503
PIR50302
#RESIN
PIR50301
10K
PIR50401
PIR50602
ETH RX_N
ETH RX_P
PIR50601
16
PIU501016
ETH TX_N
ETH TX_P
PIR50702
17
PIU501017
ETH LNK LED
ETH SPD LED
ETH RX LED
COR504
R504
49R9
POETHERNET00
ETHERNET..
PIC50202
COR506
R506
49R9
PIC50201
COC502
C502
100nF
ETH RX_N
ETH RX_P
SGND
PIR50701
PIR50802
LEDs Active Low
PIR50801
DVSS
100nF
36
PIC506 2
COC505
C505
IOVSS
IOVSS
PIC50501
35
47
PIC50 2
100nF
AVSS
AVSS
COC504
C504
COY501
+3V3 Y501
4
PIY50104 VDD
3
PIY50103
28
LED_LINK PIU501028
27
LED_SPEED PIU501027
26
LED_ACT/COL PIU501026
37
PIU501037 PFBIN2
23
PIU501023 PFBOUT
100nF
13
RD- PIU501013
14
RD+ PIU501014
TDTD+
PIU501030
15
19
PIC504 1
X2
X1
COC501
C501
SGND
COU501
U501
8
NC PIU50108
9
NC PIU50109
10
PIU501010
NC
11
NC PIU501011
12
NC PIU501012
7
PIU50107
PWR_DOWN/INT
18
PIU501018
PFBIN1
PIC50402
B
IOVDD33
IOVDD33
3
PIU50103
21
20
22
2
PIU50102
AVDD33
1
PIU50101
TX_CLK
(ENET_TX_EN)
(ENET_TXD0)
(ENET_TXD1)
RESERVED
RESERVED
P1_4
P1_0
P1_1
PIC510 1
PIC501
COC510
C510
10uF 10V
SGND
PIU5012 PIU5012 PIU5012 PIU50148 PIU50132
A
COC509
C509
100nF
PIC510 2
PIC503 2
COR507
R507
49R9
PIC50301
ETH TX_N
ETH TX_P
COC503
C503
100nF
COR508
R508
49R9
B
ETHERNET..
DP83848CVV
SGND
SGND
+3V3
PIC50802
PIC508 1
+3V3
PIR51402
SGND
/CS_SD
COJ501
J501
1
NC
/CS_SD
2
PIJ50102 /CS
SPI_MOSI1
3
PIJ50103 DI
4
PIJ50104 VDD
SPI_SCK1
5
PIJ50105 CLK
6
PIJ50106 VSS
SPI_MISO1
7
PIJ50107 DO
8
PIJ50108 RSV
COU502
U502
+3V3
PIJ50101
PIR51401
+3V3
SGND
3
8
RS PIU50208
PIU50203 VCC
CAN0_TX_LOCAL
1
PIU50201
CAN0_RX_LOCAL
D
4
PIU50204 R
2
PIU50202
PIR51302
ST2S008V1A
PIR51301
COR513
R513
10K
CANH0
1
10K
GND
CANH
PIJP50101
SGND
7
PIJP50102
PIU50207
PIR5120
6
CANL PIU50206
VREF
C
JP501
COJP501
Jumper
2
COR514
R514
C
COC508
C508
100nF
PIR51201
5
PIU50205
COR512
R512
120R
CANL0
SGND
SN65HVD230D
SGND
D
D
Checked By:
Title:
Hitex (UK) Ltd.
Sir William Lyons Road
University of Warwick Science Park
Coventry
Ethernet, CAN, SD Card
Size:
Approved By:
1
2
3
4
5
Number:
Revision:
A3
EDP-CM-LPCx
B
Date: 07/04/2010
(c) Hitex (UK) Ltd.
Sheet5
of 5
File: D:\PCB Designs\DXP\EDP-CM-LPCx\Rev B\Ethernet.SchDoc
6
Author: A.Davison
7
8