Download LEON2 Processor User`s Manual

LEON2 XST User’s Manual
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
1.4.10
1.4.11
1.4.12
1.4.13
1.4.14
1.4.15
1.5
Introduction.....................................................................................................
Overview.........................................................................................................
License............................................................................................................
Fault-tolerant LEON (LEON-FT)...................................................................
Functional overview .......................................................................................
Integer unit......................................................................................................
Floating-point unit and co-processor ..............................................................
Cache sub-system ...........................................................................................
Memory management unit..............................................................................
Debug support unit .........................................................................................
Memory interface............................................................................................
Timers .............................................................................................................
Watchdog........................................................................................................
UARTs............................................................................................................
Interrupt controller..........................................................................................
Parallel I/O port ..............................................................................................
AMBA on-chip buses .....................................................................................
PCI interface ...................................................................................................
Ethernet MAC.................................................................................................
On-chip ram ....................................................................................................
Performance....................................................................................................
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8
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8
9
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9
9
10
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10
10
10
10
11
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11
2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
Simulation and synthesis ................................................................................
Un-packing the tar-file....................................................................................
Configuration..................................................................................................
Simulation.......................................................................................................
Compilation of the model ...............................................................................
Generic test bench...........................................................................................
Disassembler...................................................................................................
Modelsim support ...........................................................................................
Ncsim support.................................................................................................
GNU VHDL (GHDL) support........................................................................
Synopsys VSS support....................................................................................
Post-synthesis simulation................................................................................
Synthesis .........................................................................................................
General............................................................................................................
Synplify...........................................................................................................
Synopsys-DC ..................................................................................................
Xilinx XST......................................................................................................
Synthesis board support packages ..................................................................
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12
12
13
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14
14
14
14
14
15
15
15
15
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3
3.1
3.2
LEON integer unit .......................................................................................... 18
Overview......................................................................................................... 18
Instruction pipeline ......................................................................................... 19
GAISLER RESEARCH