Download EX1629 - VTI Instruments

VTI Instruments Corp.
vtex1629_set_sample_clock_source
FUNCTION PROTOTYPE
ViStatus vtex1629_set_sample_clock_source (ViSession vi, ViInt32 sampleClockMode, ViInt32 inLine, ViInt32
outLine);
FUNCTION PARAMETERS
vi = contains a session handle to the instrument. This handle is obtained by the function and remains valid until the
session is closed.
sampleClockMode = an integer input value that determines whether the EX1629 is operating as a master or slave.
Valid input values: VTEX1629_SAMP_CLK_MODE_MASTER or VTEX1629_SAMP_CLK_MODE_SLAVE.
inLine = an integer input value that determines the trigger bus line configured to use for sample clock input. Valid
input values: VTEX1629_LXI_LINE_ZERO, VTEX1629_LXI_LINE_FOUR, or VTEX1629_LXI_LINE_NONE.
outLine = an integer input value that determines the trigger bus line configured to output sample clock events. Valid
input values: VTEX1629_LXI_LINE_ZERO to VTEX1629_LXI_LINE_SEVEN, VTEX1629_LXI_LINE_NONE.
DATA ITEM RESET VALUE
inLine = VTEX1629_LXI_LINE_NONE
outLine = VTEX1629_LXI_LINE_NONE
sampleClockMode = VTEX1629_SAMP_CLK_MODE_MASTER
DESCRIPTION
This function sets the sample clock source for the device.
The sampleClockMode parameter indicates whether the EX1629 is configured as a master device that outputs a
sample clock for itself and other devices or as a slave device that receives its sample clock from another device.
When operating in standalone mode, sampleClockMode should be configured as a master.
The inLine parameter indicates the LXI line that should be used as the sample clock input. This value is applicable
regardless of whether the device is configured as a master or a slave. When inLine is set to
VTEX1629_LXI_LINE_NONE, a special, internal sample clock line is used.
The outLine parameter indicates the LXI line that should be used as the sample clock output. This value is only
applicable when the device is configured as a master. When outLine is set to VTEX1629_LXI_LINE_NONE, the
sample clock is output on a special, internal sample clock line. When in Slave mode, no output line can be used, so
VTEX1629_LXI_LINE_NONE must be specified.
Decimal
Value
Hex
Value
0
4
8
0x00
0x04
0x08
#define Symbol
VTEX1629_LXI_LINE_ZERO
VTEX1629_LXI_LINE_FOUR
VTEX1629_LXI_LINE_NONE
inLine/outLine
Description
LXI LINE 0
LXI LINE 4
None
When in master mode, the inLine and outLine values may be the same or they may be different. One case where
they would be different is if the master is outputting the sample clock on one LXI line and receiving it back in from
an LXI Trigger Bus hub on another line. When in standalone mode, inLine and outLine will always be the same.
EXAMPLE
ViSession instrumentHandle;
ViStatus status;
…
status = vtex1629_set_sample_clock_source(instrumentHandle,
VTEX1629_SAMP_CLK_MODE_MASTER,
VTEX1629_LXI_LINE_ZERO,
VTEX1629_LXI_LINE_ZERO);
278
EX1629 Command Set