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Download Xilinx ISE In-Depth Tutorial
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Chapter 4: Schematic-Based Design X-Ref Target - Figure 4-2 Figure 4-2: Completed Stopwatch Schematic After the design is complete, you will simulate the design to verify its functionality. For more information about simulating your design, see Chapter 5, Behavioral Simulation. There are five external inputs and four external outputs in the completed design. The following sections summarize the inputs and outputs, and their respective functions. Inputs The following are input signals for the tutorial stopwatch design: • strtstop Starts and stops the stopwatch. This is an active low signal which acts like the start/ stop button on a runner’s stopwatch. • reset Puts the stopwatch in clocking mode and resets the time to 0:00:00. • clk Externally generated system clock. 44 www.xilinx.com ISE In-Depth Tutorial UG695 (v14.1) April 24, 2012
