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eZ80Acclaim!® Microcontrollers eZ80F91 Modular Development Kit User Manual UM017010-0112 Copyright ©2012 Zilog®, Inc. All rights reserved. www.zilog.com eZ80F91 Modular Development Kit User Manual ii Warning: DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS. LIFE SUPPORT POLICY ZILOG’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION. As used herein Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Document Disclaimer ©2012 Zilog Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO D O E S N O T A S S U M E L I A B I L I T Y F O R I N T E L L E C T U A L P R O P E RT Y INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this document has been verified according to the general principles of electrical and mechanical engineering. eZ80 and eZ80Acclaim! are registered trademarks of Zilog Inc. All other product or service names are the property of their respective owners. UM017010-0112 eZ80F91 Modular Development Kit User Manual iii Revision History Each instance in the table below reflects a change to this document from its previous edition. For more details, refer to the corresponding pages and appropriate links in the table below. Date Revision Level Description Page Jan 2012 10 Modified references to eZ80F91 Modular Development Kit 1, 23, 24, and supporting documentation; added PHY section; 34, 35 updated physical dimensions, Figures 12 and 13. Jul 2008 09 Updated Figures 12 and 13. 34, 35 May 2008 08 Updated Table 1, I/O Mini-Module Connector J2 section; updated Table 2, Peripheral Bus External Connector JP1 section; added Figures 12 and 13; updated for style. 6, 9, 9, 12, 34, 35, All UM017010-0112 Revision History eZ80F91 Modular Development Kit User Manual iv Table of Contents Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Safeguards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 eZ80F91 Modular Development Kit Overview . . . . . . . . . . . . . . . . . . . . . . . . .3 eZ80Acclaim! MDS Adapter Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 eZ80F91 Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Peripheral Bus Mini-Module Connector J1 . . . . . . . . . . . . . . . . . . . . . .5 I/O Mini-Module Connector J2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Peripheral and I/O External Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Peripheral Bus External Connector JP1 . . . . . . . . . . . . . . . . . . . . . . . .12 I/O External Connector JP2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 GPRS Wireless Modem Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 eZ80Acclaim! MDS Adapter Board Jumper Settings . . . . . . . . . . . . . . . . .20 eZ80Acclaim! MDS Adapter Board Test Switch and LEDs . . . . . . . . . . .21 eZ80F91 Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 eZ80F91 Module Operational Description . . . . . . . . . . . . . . . . . . . . . . . . .22 Static RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 On-Chip Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 External Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 PHY Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 IrDA Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Programming On-Chip Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Flash Loader Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 UM017010-0112 Table of Contents eZ80F91 Modular Development Kit User Manual v ZDS II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 IrDA Port Not Working . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Customer Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 UM017010-0112 Table of Contents eZ80F91 Modular Development Kit User Manual 1 Introduction Zilog’s eZ80F91 Modular Development Kit, represented by part numbers eZ80F910100KITG and eZ80F910200KITG, provides a general-purpose platform for creating a design based on an eZ80F91 microcontroller. The eZ80F91 MCU is a member of Zilog’s eZ80Acclaim! product family, which offers an on-chip Flash capability. The eZ80F91 Modular Development Kit contains an eZ80F91 Module (which features the eZ80F91 MCU) plus an eZ80Acclaim! MDS Adapter Board. The eZ80F91 Module is mounted onto the eZ80Acclaim! MDS Adapter Board. Kit Features The key features of the eZ80F91 Modular Development Kit are: • eZ80F91 Module: – eZ80F91 device operating at 50 MHz, with 256 KB of internal Flash memory, and 8 KB of internal SRAM memory – 128 KB of off-chip SRAM memory – On-chip Ethernet Media Access Controller (EMAC) – Ethernet port and PHY – Real-Time Clock support – Footprint for an SIR IrDA transceiver – Two 56-pin mini-module connectors for attachment to the eZ80Acclaim! MDS Adapter Board • eZ80Acclaim! MDS Adapter Board: – Footprint for 2 M x 8 external Flash memory such as AM29LV160D – Footprint for 10-bit bus switch such as 74CBTLV3384, to support external Flash UM017010-0112 Introduction eZ80F91 Modular Development Kit User Manual 2 – – – – – – – – • • • RS-232 connector with interface circuit for UART0 ZDI and JTAG debug connectors Two 56-pin mini-module connectors Two 60-pin interface connectors for connection to an external application or development board (not supplied) 32-pin header and footprint for a GPRS modem on UART1 One green 3.3 OK LED One yellow Test LED and pushbutton 5 VDC external power supply USB Smart Cable eZ80Acclaim! software and documentation CD-ROM Schematics for the eZ80F91 Mini Enet Module and eZ80Acclaim! MDS Adapter Board Safeguards The following precautions must be taken while working with the devices described in this document. Caution: Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). UM017010-0112 Kit Features eZ80F91 Modular Development Kit User Manual 3 eZ80F91 Modular Development Kit Overview The purpose of the eZ80F91 Modular Development Kit is to provide a set of tools for designing an application based on the eZ80F91 microcontroller. A block diagram of the eZ80Acclaim! MDS Adapter Board is displayed in Figure 1 . Figure 1. eZ80Acclaim! MDS Adapter Board Block Diagram UM017010-0112 eZ80F91 Modular Development Kit Overview eZ80F91 Modular Development Kit User Manual 4 Figure 2 displays a block diagram of the eZ80F91 Module. Figure 2. eZ80F91 Mini Enet Module Block Diagram Schematics for the eZ80F91 Module and eZ80Acclaim! MDS Adapter Board are provided in the Schematics chapter on page 30. UM017010-0112 eZ80F91 Modular Development Kit Overview eZ80F91 Modular Development Kit User Manual 5 eZ80Acclaim! MDS Adapter Board This chapter describes the functions of the eZ80Acclaim! MDS Adapter Board. eZ80F91 Module Interface The eZ80F91 Module interface on the eZ80Acclaim! MDS Adapter Board consists of two 56-pin mini-module receptacles. Almost all of these receptacles’ signals are connected directly to the CPU. Three input signals offer options by disabling certain functions of the eZ80F91 Module. These three input signals are: Disable IrDA (DIS_IrDA). Used only if you have installed an external SIR IrDA transceiver onto the eZ80F91 Module. When the DIS_IrDA input signal is pulled Low, the IrDA transceiver located on the eZ80F91 Module is disabled. As a result, UART0 can be used with RS-232 or RS-485 interfaces on the eZ80 development platform. F91_WE. When the F91_WE signal is active Low, internal Flash on the eZ80F91 chip is enabled for writing. This signal is inverted from the F91_WP signal on the eZ80F91 chip. RTC_VDD. Test point for the Real-Time Clock power supply. Peripheral Bus Mini-Module Connector J1 Figure 3 displays the pin layout of 56-pin Peripheral Bus Mini-Module Connector, J1, on the eZ80Acclaim! MDS Adapter Board. Table 1 lists the pins and their functions. UM017010-0112 eZ80Acclaim! MDS Adapter Board eZ80F91 Modular Development Kit User Manual 6 Figure 3. eZ80Acclaim! MDS Adapter Board Peripheral Bus Mini-Module Connector J1 Pin Configuration Table 1. eZ80Acclaim! MDS Adapter Board Peripheral Bus Connector J1 Identification1,2 Pin Symbol Signal Direction Active Level eZ80F91 Signal 3 A6 Bidirectional n/a Yes 4 A0 Bidirectional n/a Yes Note Notes: 1. To simplify the interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. External capacitive loads on RD, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF to satisfy the timing requirements for the eZ80 CPU. All unused inputs should be pulled to either VDD or GND, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in the eZ80F91 MCU’s Peripheral Power-Down Register. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 7 Table 1. eZ80Acclaim! MDS Adapter Board Peripheral Bus Connector J1 Identification1,2 (Continued) Pin Symbol Signal Direction Active Level eZ80F91 Signal 5 A7 Bidirectional n/a Yes 6 A2 Bidirectional n/a Yes 7 A8 Bidirectional n/a Yes 8 A1 Bidirectional n/a Yes 9 A10 Bidirectional n/a Yes 10 A3 Bidirectional n/a Yes 13 RD Output Low Yes 14 D5 Bidirectional n/a Yes 15 D1 Bidirectional n/a Yes 16 D4 Bidirectional n/a Yes 17 D0 Bidirectional n/a Yes 18 D2 Bidirectional n/a Yes 19 A17 Bidirectional n/a Yes 20 D6 Bidirectional n/a Yes 23 A19 Bidirectional n/a Yes 24 A18 Bidirectional n/a Yes 25 A21 Bidirectional n/a Yes 26 A20 Bidirectional n/a Yes 27 A23 Bidirectional n/a Yes 28 A22 Bidirectional n/a Yes Note Notes: 1. To simplify the interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. External capacitive loads on RD, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF to satisfy the timing requirements for the eZ80 CPU. All unused inputs should be pulled to either VDD or GND, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in the eZ80F91 MCU’s Peripheral Power-Down Register. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 8 Table 1. eZ80Acclaim! MDS Adapter Board Peripheral Bus Connector J1 Identification1,2 (Continued) Pin Symbol Signal Direction Active Level eZ80F91 Signal 29 CS3 Output Low Yes 30 CS0 Output Low Yes 33 F91_WE Input Low No 34 CS2 Output Low Yes 35 D3 Bidirectional n/a Yes 36 RTC_VDD Input n/a Yes 39 D7 Bidirectional n/a Yes 40 HALT_SLP Output Low Yes 41 A13 Bidirectional n/a Yes 42 WR Output Low Yes 43 A12 Bidirectional n/a Yes 44 A11 Bidirectional n/a Yes 45 A14 Bidirectional n/a Yes 46 A9 Bidirectional n/a Yes 49 A16 Bidirectional n/a Yes 50 A5 Bidirectional n/a Yes 51 A15 Bidirectional n/a Yes 52 A4 Bidirectional n/a Yes Note Jumper on board Notes: 1. To simplify the interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. External capacitive loads on RD, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF to satisfy the timing requirements for the eZ80 CPU. All unused inputs should be pulled to either VDD or GND, depending on their inactive levels, to reduce power consumption and to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in the eZ80F91 MCU’s Peripheral Power-Down Register. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 9 I/O Mini-Module Connector J2 Figure 4 displays the pin layout of the 56-pin Peripheral Bus Mini-Module Connector, J2, on the eZ80Acclaim! MDS Adapter Board. Table 2 lists the pins and their functions. Figure 4. eZ80Acclaim! MDS Adapter Board I/O Mini-Module Connector J2 Table 2. eZ80Acclaim! MDS Adapter Board I/O Mini-Module Connector J2 Identification1 Active Level eZ80F91 Signal2 Bidirectional n/a Yes Bidirectional n/a Yes Pin Symbol Signal Direction 1 PA3 2 PA4 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 10 Table 2. eZ80Acclaim! MDS Adapter Board I/O Mini-Module Connector J2 Identification1 Active Level eZ80F91 Signal2 Bidirectional n/a Yes PA5 Bidirectional n/a Yes 5 PB5 Bidirectional n/a Yes 6 PA0 Bidirectional n/a Yes 7 PB6 Bidirectional n/a Yes 8 PA1 Bidirectional n/a Yes 10 EZ80CLK Output n/a Yes 11 PB1 Bidirectional n/a Yes 12 PB7 Bidirectional n/a Yes 13 PC4 Bidirectional n/a Yes 14 PB3 Bidirectional n/a Yes 15 PA6 Bidirectional n/a Yes 16 PC7 Bidirectional n/a Yes 17 PB4 Bidirectional n/a Yes 18 PA2 Bidirectional n/a Yes 21 PB2 Bidirectional n/a Yes 22 PB0 Bidirectional n/a Yes 23 PC6 Bidirectional n/a Yes 24 PC5 Bidirectional n/a Yes 25 PC3 Bidirectional n/a Yes 26 PC1 Bidirectional n/a Yes 27 PC2 Bidirectional n/a Yes Pin Symbol Signal Direction 3 PA7 4 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 11 Table 2. eZ80Acclaim! MDS Adapter Board I/O Mini-Module Connector J2 Identification1 Active Level eZ80F91 Signal2 Bidirectional n/a Yes TMS Input n/a Yes 32 PD7 Bidirectional n/a Yes 33 PD6 Bidirectional n/a Yes 34 PD5 Bidirectional n/a Yes 35 PD3 Bidirectional n/a Yes 36 PD4 Bidirectional n/a Yes 37 TRSTN Input Low Yes 38 TRIGOUT Output n/a Yes 41 TCK Input n/a Yes 42 PD1 Bidirectional n/a Yes 43 TDI Bidirectional n/a Yes 44 PD0 Bidirectional n/a Yes 45 PD2 Bidirectional n/a Yes 46 TDO Output n/a Yes 49 DIS_IRDA Input Low No 50 IICSCL I/O n/a Yes 51 WAIT Input Low Yes 52 IICSDA I/O n/a Yes 53 RST I/O Low Yes 54 NMI Input Low Yes Pin Symbol Signal Direction 28 PC0 31 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 12 Peripheral and I/O External Interface The Peripheral and I/O external interface on the eZ80Acclaim! MDS Adapter Board consists of two 60-pin mini-module receptacles. Peripheral Bus External Connector JP1 Figure 5 displays the pin layout of Peripheral Bus External Connector, JP1, in the 60-pin header on the eZ80Acclaim! MDS Adapter Board. Table 3 lists the pins and their functions. Figure 5. eZ80Acclaim! MDS Adapter Board Peripheral Bus External Connector JP1 UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 13 Caution: The following signals are not connected and are unavailable on the associated pins: • • • • • • • Pin 36, DIS_FLASH Pin 42, CS1 Pin 53, MREQ Pin 54, IOREQ Pin 58, INSTRD Pin 59, BUSACK Pin 60, BUSREQ Table 3. eZ80Acclaim! MDS Adapter Board Peripheral Bus External Connector JP1 Identification1 Pin Symbol Signal Direction Active Level eZ80F91 Signal2 1–4, 6, Unused 8, 35 n/a n/a n/a 5 TRSTN Input Low Yes 11 A6 Bidirectional n/a Yes 12 A0 Bidirectional n/a Yes 13 A10 Bidirectional n/a Yes 14 A3 Bidirectional n/a Yes 17 A8 Bidirectional n/a Yes 18 A7 Bidirectional n/a Yes Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 14 Table 3. eZ80Acclaim! MDS Adapter Board Peripheral Bus External Connector JP1 Identification1 (Continued) Active Level eZ80F91 Signal2 Bidirectional n/a Yes A9 Bidirectional n/a Yes 21 A15 Bidirectional n/a Yes 22 A14 Bidirectional n/a Yes 23 A18 Bidirectional n/a Yes 24 A16 Bidirectional n/a Yes 25 A19 Bidirectional n/a Yes 27 A2 Bidirectional n/a Yes 28 A1 Bidirectional n/a Yes 29 A11 Bidirectional n/a Yes 30 A12 Bidirectional n/a Yes 31 A4 Bidirectional n/a Yes 32 A20 Bidirectional n/a Yes 33 A5 Bidirectional n/a Yes 34 A17 Bidirectional n/a Yes 36 DIS_FLASH Input Low No 37 A21 Bidirectional n/a Yes 39 A22 Bidirectional n/a Yes 40 A23 Bidirectional n/a Yes 41 CS0 Output Low Yes 42 CS1 Output Low Yes 43 CS2 Output Low Yes Pin Symbol Signal Direction 19 A13 20 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 15 Table 3. eZ80Acclaim! MDS Adapter Board Peripheral Bus External Connector JP1 Identification1 (Continued) Active Level eZ80F91 Signal2 Bidirectional n/a Yes D7 Bidirectional n/a Yes 52 D6 Bidirectional n/a Yes 53 MREQ Output Low Yes 54 IOREQ Output Low Yes 56 RD Output Low Yes 57 WR Output Low Yes 58 INSTRD Output Low Yes 59 BUSACK Output Low Yes 60 BUSREQ Input Low Yes Pin Symbol Signal Direction 44-49 D[0:5] 51 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 16 I/O External Connector JP2 Figure 6 displays the pin layout of the I/O Connector in the 60-pin header on the eZ80Acclaim! MDS Adapter Board. Table 4 lists the pins and their functions. Figure 6. eZ80Acclaim! MDS Adapter Board I/O External Connector JP2 Caution: The FLASWE signal is disconnected and unavailable on pin 49. UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 17 Table 4. eZ80Acclaim! MDS Adapter Board I/O External Connector JP2 Identification1 Active Level eZ80F91 Signal2 Bidirectional n/a Yes PB7 to PB0 Bidirectional n/a Yes 20–27 PC7 to PC0 Bidirectional n/a Yes 28, 29 PD7, PD6 Bidirectional n/a Yes 31–36 PD5 to PD0 Bidirectional n/a Yes 37 TDO Output n/a Yes 38 TDI I/O n/a Yes 40 TRIGOUT Output n/a Yes 41 TCK Input n/a Yes 42 TMS Input n/a Yes 43 RTC_VDD Input n/a Yes 44 EZ80CLK Output n/a Yes 45 IICSCL I/O n/a Yes 47 IICSDA I/O n/a Yes 49 FLASHWE Input Low No 51 CS3 Output Low Yes 52 DIS_IRDA Input Low No 53 RST I/O Low Yes 54 WAIT Input Low Yes 57 HALT_SLP Output Low Yes 58 NMI Input Low Yes 60 unused n/a n/a n/a Pin Symbol Signal Direction 1–8 PA7 to PA0 11–18 Notes: 1. To simplify interface description, Power and Ground nets are omitted from this table. The entire interface is represented in the eZ80Acclaim! MDS Adapter Board schematics; see Figures 8 and 9. 2. The Power and Ground nets are connected directly to the eZ80F91 device. UM017010-0112 Peripheral and I/O External Interface eZ80F91 Modular Development Kit User Manual 18 GPRS Wireless Modem Interface The MDS Adapter Board includes connectors for adding a MultiTech SocketModem GSM/GPRS data/fax wireless modem module, part numbers MTSMC-G-F1 (900/1800 MHz) or MTSMC-G-F2 (850/1900 MHz). This interface is implemented on the UART1 (PCx) interface and consists of connectors J3, J11, and J12. For information about the MultiTech module, refer to the Multitech website. Figure 7 displays the pin layout of the three GPRS module connectors on the eZ80Acclaim! MDS Adapter Board. Table 5 lists connector J3 pins and functions. Table 6 lists connector J11 pins and functions. Figure 7. eZ80Acclaim! MDS Adapter Board GPRS Wireless Modem Connectors J3, J11 and J12 UM017010-0112 GPRS Wireless Modem Interface eZ80F91 Modular Development Kit User Manual 19 Note: The pins on Connector J12 are not connected to any MDS board signals. Table 5. eZ80Acclaim! MDS Adapter Board GPRS Wireless Modem Connector J3 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 unused n/a n/a n/a 2 GND n/a n/a Yes 3 unused n/a n/a n/a 4 VCC_5V n/a n/a No 5–23 unused n/a n/a n/a 24 GND n/a n/a Yes 25 PC4_DTR1 Output Low Yes 26 PC6_DCD1 Input Low Yes 27 PC3_CTS1 Input Low Yes 28 PC5_DSR1 Input Low Yes 29 PC7_RI1 Input Low Yes 30 PC0_TXD1 Output n/a Yes 31 PC1_RXD1 Input n/a Yes 32 PC2_RTS1 Output Low Yes Table 6. eZ80Acclaim! MDS Adapter Board GPRS Wireless Modem Connector J11 Identification Pin Symbol Signal Direction 1 RST 2 GND UM017010-0112 Active Level eZ80F91 Signal Output Low Yes n/a n/a Yes GPRS Wireless Modem Interface eZ80F91 Modular Development Kit User Manual 20 eZ80Acclaim! MDS Adapter Board Jumper Settings The eZ80Acclaim! MDS Adapter Board contains four jumpers that are listed in Table 7. Table 7. eZ80Acclaim! MDS Adapter Board Jumper Settings Jumper Name Affected Device Position Function J4, FL_EN On-board Flash (when installed) IN (Default) On-board Flash is enabled. OUT On-board Flash is disabled. On-board Flash (when installed) IN On-board Flash is disabled for writing. OUT On-board Flash is enabled for writing J6, FL_WEN 1 J8, RS-232-1 DIS DB9 connector P2 IN OUT J9, IRDA_DIS2 RS-232 output on connector P2 is disabled; PB6 = Don’t Care. When PB 6 = 0, the RS-232 output on connector P2 is disabled. When PB 6 = 1, the RS-232 output on connector P2 is enabled. In all cases, the RS-232 input on connector P2 is enabled. IrDA transceiver IN (Default) IrDA transceiver on eZ80F91 Mini (when installed) Enet Module is disabled. OUT IrDA transceiver on eZ80F91 Mini Enet Module is enabled. Notes: 1. If AM29LV160 is used, J6 and R6 should be OUT. If AT49BV162 is used, R6 should be IN, and J6 should be OUT. 2. Jumper J9 functions only when you have installed IrDA transceiver on eZ80F91 Mini Enet Module. UM017010-0112 eZ80Acclaim! MDS Adapter Board Jumper Settings eZ80F91 Modular Development Kit User Manual 21 eZ80Acclaim! MDS Adapter Board Test Switch and LEDs The MDS Adapter Board contains a Test pushbutton switch (S1) and two LEDs (D1 and D2) that function as follows: • • • UM017010-0112 Pressing the Test pushbutton S1 pulls PB3 Low The yellow LED, D1, is controlled by PB5 (active Low) The green LED, D2, is illuminated when power is applied to the board eZ80Acclaim! MDS Adapter Board Test Switch and LEDs eZ80F91 Modular Development Kit User Manual 22 eZ80F91 Module This section describes the eZ80F91 Module hardware and its interfaces and key components, including the CPU, real-time clock and memory. Functional Description The eZ80F91 Module is a compact and high-performance module that has been designed for the rapid development and deployment of embedded systems. Despite its small footprint, the eZ80F91 Module provides a CPU, Ethernet interface, SRAM and real-time clock. This module is powered by the eZ80F91 microcontroller, a member of the eZ80Acclaim! product family. eZ80F91 Module Operational Description As a feature of the eZ80F91 Modular Development Kit, the purpose of the eZ80F91 Module is to provide a design platform to enable the use of such eZ80F91 device features as on-chip EMAC, SRAM and Flash. Static RAM The eZ80F91 Module features 128 KB of fast SRAM. Access speed is typically 12 ns, allowing zero-wait-state operation at 50 MHz. With the CPU operating at 50 MHz, SRAM can be accessed with zero wait states in eZ80 Mode. CS1_CTL (CS1) can be set to 08h (no wait states). The eZ80F91 Mini Enet Module is shipped with SRAM powered from the same power supply as the eZ80F91 device. The SRAM can also be powered separately with a battery. To power SRAM from a battery, observe the following brief procedure: 1. UM017010-0112 Remove R15. eZ80F91 Module eZ80F91 Modular Development Kit User Manual 23 2. Ensure that R14 is in place. 3. Connect the negative (–) battery lead to GND. 4. Connect the positive (+) battery lead to J10. On-Chip Flash Memory The eZ80F91 MCU on the eZ80F91 Module features 256 KB of on-chip Flash memory, which can be programmed a single byte at a time, or in bursts of up to 256 bytes. Write operations can be performed using either memory or I/O instructions. Erasing bytes in Flash memory returns them to a value of FFh. Both the MASS ERASE and PAGE ERASE operations are self-timed by the Flash controller, leaving the CPU free to execute other operations in parallel. Upon power-up, on-chip Flash memory is located in the address range 000000h-03FFFFh. Four wait states are programmed in Flash Control Register F8h. On-chip Flash memory is prioritized over all external chip selects, can be enabled or disabled (power-on enabled), and can be programmed within any 256 KB address space in the 16 MB address range. The eZ80F91 Module features the following memory configurations: • • • 8 KB on-chip SRAM 128 KB off-chip SRAM 256 KB on-chip Flash To learn more about the programming of internal Flash memory, refer to the eZ80F91 ASSP Product Specification (PS0270). External Flash Memory The eZ80F91 MDS Adapter Board provides a footprint for 2 MB of external Flash memory. The eZ80F91 Mini Enet Module supports this external UM017010-0112 eZ80F91 Module Operational Description eZ80F91 Modular Development Kit User Manual 24 Flash via the full system bus, which is available on the expansion interface connectors. PHY Circuit The PHY KS8721 circuit has been extensively tested. However, for new designs, Zilog recommends that you refer to the following documentation on the Micrel website. • KS8721BL/SL 3.3 V Single Power Supply 10/100 Base-TX/FX MII Physical Layer Transceiver Data Sheet • KS8721BL/KS8721CL/KS8001L Design Guide for Interchangeability (Application Note 134) IrDA Transceiver The eZ80F91 Mini Enet Module is shipped without an IrDA transceiver installed. If you install an on-board transceiver, such as Zilog’s ZHX1810, it connects to PD0 (TX), PD1 (RX) and PD2 (Shutdown, IR_SD). The IrDA transceiver is of the LED type 870 nm Class 1. The IrDA transceiver is accessible via the IrDA Controller attached to UART0 on the eZ80F91 device. To save power or to use the UART0 as a console, the transceiver can be disabled by the software or by an off-board signal when using the proper jumper selection. The transceiver is disabled by setting PD2 (IRDA_SD) High or by pulling the DIS_IRDA pin on the I/O connector Low. The shutdown feature is used to save power. To enable the IrDA transceiver, DIS_IRDA remains floating and PD2 is pulled Low. The RxD and TxD signals on the transceiver perform the same functions as a standard RS-232 port. However, these signals are processed as IrDA 3/16 coding pulses (sometimes called IrDA encoder/decoder pulses). When the IrDA function is enabled, the final output to the RxD and TxD pins are routed through the 3/16 pulse generator. UM017010-0112 eZ80F91 Module Operational Description eZ80F91 Modular Development Kit User Manual 25 Another signal that is used in the eZ80F91 Module’s IrDA system is Shut_Down (SD). The SD pin is connected to PD2 on the eZ80F91 Module. The IrDA control software on the user’s wireless device must enable this pin to wake the IrDA transceiver. The SD pin must be set Low to enable the IrDA transceiver. On eZ80F91 Module, a two-input OR gate is used to allow an external pin to shut down the IrDA transceiver. Both pins must be set Low to enable this function. The eZ80F91 Module features an Infrared Encoder/Decoder register that configures the IrDA function. This register is located at address 0BFh in the internal I/O register map. The Infrared Encoder/Decoder register contains three control bits: Bit 0. Enables or disables the IrDA encoder/decoder block. Bit 1. If set, this bit enables received data to pass into the UART0 Receive FIFO data buffer. Bit 2. A test function that provides a loopback sequence from the TxD pin to the RxD input. Bit 1, the Receive Enable bit, is used to block data from filling up the Receive FIFO when the eZ80F91 Module is transmitting data. Because air is the transmission medium that the the IrDA signal passes through, the transmitted data can also be received; the Receive Enable bit prevents this data from being received. After the eZ80F91 Module completes transmitting, this bit is changed to allow for incoming messages. The code that follows provides an example of how this function is enabled on the eZ80F91 Module. UM017010-0112 eZ80F91 Module Operational Description eZ80F91 Modular Development Kit User Manual 26 // Init_IRDA // Make sure to first set PD2 as a port bit, an output and // set it Low. PD_ALT1 &= 0xFC; PD_ALT2 |= 0x03; UART_LCTL0= 0x80; generator BRG_DLRL0=0x2F; BRG_DLRH0=0x00; UART_LCTL0=0x00; UART_FCTL0=0xC7; UART_LCTL0=0x03; IR_CTL = 0x03; // PD0 = uart0tx, PD1 = uart0_rx // Enable alternate function // Select dlab to access baud rate IR_CTL = 0x01; Putchar(0xb0); // Disable receive // Output a byte to the uart0 port. // // // // // // // // Baud rate Masterclock/(16*baudrate) High byte of baud rate Disable dlab Clear tx fifo, enable fifo 8bit, N, 1 stop enable IRDA Encode/decode and Receive enable bit. IRDA_Xmit Programming On-Chip Flash Memory To program the 32 K boot block on the internal on-chip Flash memory, shunt JP1 on the eZ80F91 Mini Enet Module must be installed. Table 8 lists the settings for shunt JP1. Table 8. Shunt JP1, eZ80F91 Module Symbol Jumper Name JP1 F91_WE Shunt Status Affected Device In (Default) On-chip Flash is enabled for On-chip Flash writing to boot block. Out UM017010-0112 Function On-chip Flash memory boot On-chip Flash block is write-protected. Programming On-Chip Flash Memory eZ80F91 Modular Development Kit User Manual 27 Note: Shunt JP2, labeled INT on the eZ80F91 Mini Enet Module schematic, is unpopulated. It is connected to pin 25 of the Ethernet PHY (KS8721) and can be used for test purposes. Flash Loader Utility The Flash Loader utility integrated within ZDS II allows a convenient way to program on-chip Flash memory. Refer to the Zilog Developer Studio II – eZ80Acclaim! User Manual (UM0144) for more details. UM017010-0112 Flash Loader Utility eZ80F91 Modular Development Kit User Manual 28 ZDS II The Zilog Developer Studio II Integrated Development Environment (ZDS II IDE) is a complete stand-alone system that provides a state-ofthe-art development environment. Based on the Windows Vista/Win 7/ WinXP Professional user interfaces, ZDS II integrates a language-sensitive editor, project manager, C Compiler, assembler, linker, librarian and source-level symbolic debugger that supports the eZ80F91 device. For more information about ZDS II, refer to the Zilog Developer Studio II – eZ80Acclaim! User Manual (UM0144). UM017010-0112 ZDS II eZ80F91 Modular Development Kit User Manual 29 Troubleshooting Before contacting Zilog Customer Support to submit a problem report, follow the simple steps outlined on this page. If a hardware failure is suspected, contact a local Zilog representative for assistance. IrDA Port Not Working If you are using the IrDA transceiver on the eZ80F91 Module, ensure that the hardware is set up as follows: 1. to enable the control gate that drives the IrDA device, turn OFF Jumper J9 on the eZ80Acclaim! MDS Adapter Board. 2. Set port pin PD2 Low. When this port pin and Jumper J9 are turned OFF, the IrDA device is enabled. 3. Disable the RS-232 output by installing a shunt on jumper J8 on the eZ80Acclaim! MDS Adapter Board. UM017010-0112 Troubleshooting eZ80F91 Modular Development Kit User Manual 30 Schematics Figures 8 and 9 show schematic diagrams of the eZ80Acclaim! MDS Adapter Board. In these diagrams, Flash memory chip U2 is not installed; it is shown for reference only. When U2 is installed, it is accessed using CS3. connector 1 J9 1 2 2 4 6 8 VCC_33V 10 12 14 CR1 16 18 1N5817 20 22 24 26 R2 28 220 30 32 34 RTC_VDD 36 GND 38 -HALT_SLP 40 VL1 -WR 42 A11 44 A9 46 GND 48 A5 50 A4 52 GND 54 VCC_SRAM 56 VCC_33V A6 A7 A8 A10 GND -RD D1 D0 A17 GND A19 A21 A23 -CS3 VCC_33V -F91_WE D3 GND D7 A13 A12 A14 GND A16 A15 GND VCC_SRAM 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 HEADER 28x2 PA4 2 PA5 4 PA0 6 PA1 8 EZ80CLK 10 PB7 12 PB3 14 PC7 16 PA2 18 GND 20 PB0 22 PC5 24 PC1 26 PC0 28 GND 30 PD7 32 PD5 34 PD4 36 TRIGOUT 38 GND 40 PD1 42 PD0 44 TDO 46 GND 48 IICSCL 50 IICSDA 52 -NMI 54 VCC_33V 56 -DIS_IRDA GND 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 PA3 PA7 PB5 PB6 VCC_33V PB1 PC4 PA6 PB4 GND PB2 PC6 PC3 PC2 GND TMS PD6 PD3 -TRSTN GND TCK TDI PD2 GND -DIS_IRDA -WAIT -RST VCC_33V 1 2 1 3 -TRSTN 5 -F91_WE 7 GND 9 A6 11 A10 13 GND 15 A8 17 A13 19 A15 21 A18 23 A19 25 A2 27 A11 29 A4 31 A5 D1 33 35 LED YEL A21 37 A22 39 -CS0 41 -CS2 43 D1 45 D3 47 D5 49 D7 51 -MREQ 53 GND 55 -WR 57 -BUSACK 59 HEADER 2 DIS IRDA J10 R14 1 VCC_CUST VCC_SRAM 0 HEADER 1 R15 VCC_SRAM VCC_33V 2 VCC_33V A0 A2 A1 A3 GND D5 D4 D2 D6 GND A18 A20 A22 -CS0 VCC_33V -CS2 0 R1 10K TEST R3 PB5 330 S1 PB3 1 2 GND SW PUSHBUTTON TEST HEADER 28x2 MINI MODULE CONNECTORS connector 2 JP1 J2 1 J1 JP2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 PA7 PA5 PA3 PA1 VCC_33V PB7 PB5 PB3 PB1 1 3 5 7 9 11 13 15 17 GND 19 PC6 21 PC4 23 PC2 25 PC0 27 PD6 29 PD5 31 PD3 33 PD3 PD1 35 PD1 TDO 37 GND 39 TCK 41 RTC_VDD43 IICSCL 45 IICSDA 47 -FLASHWE49 -CS3 51 -RST 53 VCC_33V 55 -HALT_SLP 57 VCC_33V 59 VCC_33V A0 A3 VCC_33V A7 A9 A14 A16 GND A1 A12 A20 A17 -DIS_FLASH VCC_33V A23 -CS1 D0 D2 D4 GND D6 -IOREQ -RD -INSTRD -BUSREQ HEADER 30x2/SM 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 PA6 PA4 PA2 PA0 GND PB6 PB6 PB4 PB2 PB0 PC7 PC5 PC3 PC1 PD7 GND PD4 PD2 PD2 PD0 PD0 TDI TRIGOUT TMS EZ80CLK GND -DIS_IRDA -WAIT GND -NMI HEADER 30x2/SM J3 U1 3 4 7 8 11 1A1 1A2 1A3 1A4 1A5 1B1 1B2 1B3 1B4 1B5 2 5 6 9 10 F_D0 F_D1 F_D2 F_D3 F_D4 D5 D6 D7 14 17 18 21 22 2A1 2A2 2A3 2A4 2A5 2B1 2B2 2B3 2B4 2B5 15 16 19 20 23 F_D5 F_D6 F_D7 1 13 1OE 2OE VCC GND 24 12 VCC_33V R4 10K GND J4 FLASH_EN 1 2 J12 D0 D1 D2 D3 D4 GND VCC_33V C1 0.001uF GND 74CBTLV3384/SO HEADER 2 U2 J5 VCC_33V 1 3 5 GND R5 10K -CS3 ZDI INTERFACE 2 4 6 PRSTn TCK TDI Header 3x2 R6 -RST A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 -RST 12 RESET VCC_33V U4A S2 1 3 2 1 2 GND 3 R7 VCC_33V 2 7 GND GND TC74LVT125 TDI TDO TCK R8 1K TVCC_RESETn VCC_33V JTAG P1 INTERFACE 1 3 5 7 9 11 13 2 4 6 8 10 12 14 F_D0 F_D1 F_D2 F_D3 F_D4 F_D5 F_D6 F_D7 NC NC 10 13 A21 RY/BY 15 VCC 37 28 OE FLASH_EN 26 CE GND GND 27 46 -WR 11 WE GND 47 BYTE 2 1 HEADER 2 GPRS MODEM CONNECTORS A0 J11 24 -RST GND 26 HEADER 9 VCC_33V C2 2 1 C3 0.001uF 0.1uF GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GND GND VCC_5V GND PC4_DTR1 PC6_DCD1 PC3_CTS1 PC5_DSR1 PC7_RI1 PC0_TXD1 PC1_RXD1 PC2_RTS1 PC4 PC6 PC3 PC5 PC7 PC0 PC1 PC2 HEADER 32 Am29LV160D GND ZiLOG, Inc. 10K 1 2 TC74LVC08 VCC_33V 7 U3A 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 VPP -RD 10K RESET 14 1 14 VCC_33V 14 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15/A-1 532 Race Street San Jose, CA 95126 GND Title TMS PRSTn eZ80 Acclaim! Platform J6 HEADER 2 Size B Document Number Rev 96C0945-001 A Figure 8. eZ80Acclaim! MDS B Schematic Diagram, #1 of 2 UM017010-0112 Schematics eZ80F91 Modular Development Kit User Manual 31 J7 F1 VCC_5V 5V + PWR JACK VCC_5V VCC_33V C4 0.1 C5 22uF U4B 14 RXE160 3 1 GND VIN VOUT GND 3.3V 2 14 4 U5 VCC_33V U3B GND 5 6 7 +C6 TC74LVC08 6 5 TC74LVT125 VCC_33V 4 R9 LT1086-3.3/TO220 22/6.3 7 680 TC74LVC08 9 8 2 C7 0.1 10 D2 7 GND U3C TC74LVT125 9 U4D 14 3.3 OK 14 10 1 GREEN POWER SUPPLY VCC_33V U4C 14 2 3 1 8 TC74LVC08 12 11 C8 13 7 GND 3 V+ GND 7 V- C1+ MAX3222 2 C1- 4 C2+ 5 C2- 6 7 C10 0.1uF U3D TC74LVT125 12 C12 0.1uF U8D 11 8 7 C11 0.1uF U6 14 13 C9 0.1uF VCC 19 0.1uF 5 9 4 8 3 7 2 6 1 TxD0 17 T1OUT T1IN 13 RTS0 8 T2OUT T2IN 12 RxD0 16 R1IN R1OUT 15 9 R2IN R2OUT 10 CTS0 NC NC EN SHDN PD1 PD3 VCC_33V U8E U8A 1 20 2 18 14 11 GND DB9 FEMALE 9 74LV05 PD0 PD2 14 P2 J8 1 1 2 74LV05 11 74LV05 RS232-1 DIS 7 GND 10 GND U8C U8B 4 U8F 74LV05 3 6 5 12 13 GND PB6 74LV05 74LV05 R10 10K R11 10K R12 10K GND R13 10K VCC_33V ZiLOG, Inc. 532 Race Street Figure 9. eZ80Acclaim! MDS Adapter Board Schematic, #2 of 2 UM017010-0112 Schematics eZ80F91 Modular Development Kit User Manual 32 Figures 10 and 11 show schematic diagrams of the eZ80F91 Module. connector 1 VCC_33V connector 2 J1 3 -F91_WP 5 R2 -CS[0..3] 4.7K R3 4.7K IICSDA IICSCL IICSDA IICSCL IICSDA IICSCL -HALT_SLP -HALT_SLP RTC_VDD eZ80CLK eZ80CLK PA[0..7] PA[0:7] PB[0..7] PB[0:7] PC[0..7] PC[0:7] PD[0..7] PD[0:7] -RST -RD -WR -RD -WR VCC_33V R6 R7 10K 2.2K 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 VCC_33V A6 A7 A8 A10 GND -RD D1 D0 A17 GND A19 A21 A23 -CS3 VCC_33V -F91_WE D3 GND D7 A13 A12 A14 GND A16 A15 GND VCC_SRAM PA4 2 PA5 4 PA0 6 PA1 8 EZ80CLK 10 PB7 12 PB3 14 PC7 16 PA2 18 GND 20 PB0 22 PC5 24 PC1 26 PC0 28 GND 30 PD7 32 PD5 34 PD4 36 TRIGOUT 38 GND 40 PD1 42 PD0 44 TDO 46 GND 48 IICSCL 50 IICSDA 52 -NMI 54 VCC_33V 56 HEADER 28x2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 PA3 PA7 PB5 PB6 VCC_33V PB1 PC4 PA6 PB4 GND PB2 PC6 PC3 PC2 GND TMS PD6 PD3 -TRSTN GND TCK TDI PD2 GND -DIS_IRDA -WAIT -RST VCC_33V R1 10K -F91_WP SN74LVC2G04 HEADER 2 JP1 -F91_WE VCC_33v R4 R5 C1 68R 330nF U2 2R7 (MMA 0204) 5 VCC 1 LEDA PD0 2 TXD IRDA_SD 4 SD PD1 3 RXD 6 GND T D[0..7] 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 0 -CS[0:3] VCC_33V A0 A2 A1 A3 GND D5 D4 D2 D6 GND A18 A20 A22 -CS0 VCC_33V -CS2 RTC_VDD GND -HALT_SLP -WR A11 A9 GND A5 A4 GND VCC_SRAM 1 2 D[0:7] -RST -F91_WE A[0..23] A[0:23] RTC_VDD U1B GND J2 ZHX1810 HEADER 28x2 -WAIT -WAIT -NMI -NMI U3 R8 10K TDI TCK TDI TCK TRIGOUT TMS TDO -TRSTN R9 10K TRIGOUT TMS TDO -TRSTN A0 A2 A1 A3 A11 A9 A5 A4 A15 A16 A14 A12 A13 A10 A8 A7 A6 1 2 3 4 13 14 15 16 17 18 19 20 21 29 30 31 32 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 -WR -RD -CS1 12 28 5 WE OE CS VCC_33V I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 6 7 10 11 22 23 26 27 VCC VCC 24 8 GND GND 25 9 D5 D4 D2 D6 D7 D3 D0 D1 U1C GND 6 2 SN74LVC2G04 VCC_SRAM C2 0.001uF C3 0.1uF VCC_33V VCC_33V GND -DIS_IRDA U1A 5 8 IDT71V124S/SO 7 U4 1 PD2 = IR_SD SN74LVC2G04 4 IRDA_SD 2 3 GND 1 4 VCC_33V GND R11 10K VCC_33V SN74AHC1G32 CONNECTORS GND ZiLOG, Inc. Figure 10. eZ80F91 Module Schematic, #1 of 2 UM017009-0708 Schematics eZ80F91 Modular Development Kit User Manual 33 D[0:7] -BUSREQ 10K -NMI TMS TCK TDI -TRSTN -F91_WP C11 GND R18 0.056uF 499 L6 WAIT M7 BUSREQ J6 TMS TCK TDI -TRSTN H7 L9 K9 L10 TMS TCK TDI TRSTN K6 RESET -F91_WP A2 WP CRS COL RXER RXDV RXD3 RXD2 RXD1 RXD0 RXCLK TXCLK D8 A7 D6 A4 C4 D5 B4 E6 C5 C6 MII_CRS MII_COL MII_RXER MII_RXDV MII_RXD3 MII_RXD2 MII_RXD1 MII_RXD0 MII_RXCLK MII_TXCLK FILT_IN Y2 D0 D1 D2 D3 D4 D5 D6 D7 -NMI -RST -RST L2 K3 J4 M3 L3 H5 L4 M4 XIN J10 H11 XOUT_O H12 5MHz NMI FILT_IN XIN XOUT R19 33 R27 100K C23 C22 18pF 18pF VCC_33V RTC_VDD G7 B5 B12 C2 C8 D9 E3 F9 G3 G6 G12 H4 H6 J12 K8 M2 M11 RTC_VDD Y3 32.768KHz C51 22pF H10 A5 B8 C1 C10 E2 E11 G2 H9 J2 J11 K4 K7 M1 J7 L8 M8 PLL_VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD PLL_VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RTC_VDD RTC_XOUT RTC_XIN C52 22pF GND eZ80F91_BGA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A1 B1 B2 C3 D4 E5 D2 D1 D3 F6 E1 E4 F1 F2 F3 F4 G1 F5 H1 H2 G4 H3 J1 G5 VCC_33V U5 MDI0 1 MDC 2 RXD3 3 RXD2 4 RXD1 5 RXD0 6 VCC_33V 7 GND 8 RXDV 9 RXCLK 10 RXER 11 GND 12 VDDC 13 TXER 14 TXCLK 15 TXEN 16 TXD0 17 TXD1 18 TXD2 19 TXD3 20 COL 21 CRS 22 GND 23 VCC_33V 24 TXD3 TXD2 TXD1 TXD0 TXEN TXER MDC MDI0 MII_TXD3 MII_TXD2 MII_TXD1 MII_TXD0 MII_TXEN MII_TXER MII_MDC MII_MDIO B7 C7 D7 A6 B6 E7 A3 B3 IORQ MRQ RD WR BUSACK CS0 CS1 CS2 CS3 M5 L5 K5 J5 L7 J3 K1 K2 L1 -CS0 -CS1 -CS2 -CS3 SCL SDA A11 A12 SCL SDA PA7_PWM3 PA6_PWM2_EC1 PA5_PWM1_TOUT1 PA4_PWM0_TOUT0 PA3_PWM3_OC3 PA2_PWM2_OC2 PA1_PWM1_OC1 PA0_PWM0_OC0 A8 F7 C9 A9 B9 E8 B10 A10 C5 22pF R26 4.7K A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 MDIO MDC RXD3/PHYAD1 RXD2/PHYAD2 RXD1/PHYAD3 RXD0/PHYAD4 VCC GND RXDV/PCS_LPBK RXC RXER/ISO GND VDDC TXER TXC/REFCLK TXEN TXD0 TXD1 TXD2 TXD3 COL/RMII CRS/RMII_BTB GND VCC RST VDDPLL XI XO GND GND VDDTX TX+ TXGND VDDRCV REXT GND GND FXSD/FXEN RX+ RXVDDRX PD LED3/NWAYEN LED2/DUPLEX LED1/SPD100/noFEF LED0/TEST INT/PHYADD0 -RST VDD_PLL 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 GND C6 TX+ TXGND R13 FB1 GND GND PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7_RI1 PC6_DCD1 PC5_DSR1 PC4_DTR1 PC3_CTS1 PC2_RTS1 PC1_RXD1 PC0_TXD1 E12 G8 F10 F11 F12 G9 G10 G11 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7_RI0 PD6_DCD0 PD5_DSR0 PD4_DTR0 PD3_CTS0 PD2_RTS0 PD1_RXD0_IRRXD PD0_TXD0_IRTXD H8 K11 K12 J9 K10 L11 L12 M12 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 HALT_SLP PHI INSTRD TDO TRIGOUT M9 B11 M6 M10 J8 C7 0.1uF C15 0.1uF C16 0.1uF + VDDC FB2 2 1 C9 Ferrite Bead 2 Ferrite Bead +C10 0.1uF 10uF GND R15 1K -SPEED -LEDLNK R16 C19 47uF 1K Make sure that power connections and nets VDD_PLL and VDDC have the shortest route possible INT C14 0.1uF + C8 10uF RX+ RX- KS8721BL Header 1 JP2 GND -RD -WR C17 0.1uF -CS[0:3] C18 0.001uF + VCC_33V C20 47uF GND C21 0.1uF TX+ TX- IICSCL IICSDA RX+ RX- R20 49.9 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 C11 C12 D10 E9 D11 F8 D12 E10 6.49K 1% 1 VCC_33V PB7_MOSI PB6_MISO PB5_ICB3 PB4_ICA2 PB3_SCK PB2_SS PB1_IC1 PB0_IC0_EC0 25 MHz22pF GND GND VDDC C13 0.1uF -RD -WR Y1 1 -WAIT -WAIT R12 VCC_33V C12 270pF A[0:23] U6 D0 D1 D2 D3 D4 D5 D6 D7 P1 VCC_33V R22 49.9 R21 49.9 R23 220 VCC_33V R24 220 PA[0:7] R25 49.9 C24 VCC_33V 1 4 2 TX+ TXCT TX- 3 5 6 RX+ RXCT RX- 8 GND 9 10 11 12 AN1 CT1 AN2 CT2 0.1uF -LEDLNK PB[0:7] HFJ11-2450E -SPEED PC[0:7] C25 0.001uF C26 0.001uF C27 0.001uF C28 0.001uF C38 0.1uF C39 0.1uF C40 0.1uF C41 0.1uF C29 0.001uF C30 0.001uF C31 0.001uF C32 0.001uF C33 0.001uF GND VCC_33V PD[0:7] -HALT_SLP eZ80CLK ZiLOG, Inc. VCC_33V VCC_33V TDO TRIGOUT GND VCC_33V CPU & PHY 532 Race Street. San Jose,CA 95126. 408.558.8500 Title eZ80F91 Ethernet Mini Module. GND GND Size B Document Number Rev 96C0942-001 C Figure 11. eZ80F91 Module Schematic, #2 of 2 UM017009-0708 Schematics eZ80F91 Modular Development Kit User Manual 34 Figure 12 indicates the physical dimensions of the eZ80F91 Ethernet Module. MOUNTING HOLES MOUNTING HOLES Figure 12. Physical Dimensions, eZ80F91 Ethernet Module UM017009-0708 Schematics eZ80F91 Modular Development Kit User Manual 35 Figure 13 indicates the physical dimensions for the eZ80Acclaim! Platform. Figure 13. Physical Dimensions, eZ80Acclaim! Development Platform UM017009-0708 Schematics eZ80F91 Modular Development Kit User Manual 36 Customer Support To share comments, get your technical questions answered, or report issues you may be experiencing with our products, please visit Zilog’s Technical Support page at http://support.zilog.com. To learn more about this product, find additional documentation, or to discover other facets about Zilog product offerings, please visit the Zilog Knowledge Base at http://zilog.com/kb or consider participating in the Zilog Forum at http://zilog.com/forum. This publication is subject to replacement by a later edition. To determine whether a later edition exists, please visit the Zilog website at http:// www.zilog.com. UM017010-0112 Customer Support