Download MSC121x User's Guide

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Registers
The default value for SP is 7, so it starts to grow just above memory associated
with address bank 0 at core data memory locations 00h to 07h. Since address
bank 1 occupies locations 08h to 0Fh, care must be taken to redefine the initial
value of SP whenever register bank 1 (or 2 or 3) is to be used. The selection
of the active register bank is determined by bits 4 and 3 of the Program Status
Word (PSW). For example, when RS1 = 1 and RS0 = 1, bank 3 is active and
R2 corresponds with core data memory location 1Ah.
PSW also contains the Carry flag (CY), Auxiliary Carry (AC), General-purpose
flags F1 and F0, as well as the Overflow flag (OV) and the Parity flag (P). Some
instructions change the flags, but the majority do not.
Register B is sometimes useful to store a byte-wide variable or 8 bit-wide variables, especially for applications written entirely in assembly language. Care
is needed because it is used by MUL and DIV instructions that may be called
by C run-time libraries.
The 16-bit program counter (PC) is incremented as sequential instructions are
executed. For jumps, it is loaded with a new value, and for CALLs and interrupts, it is stored to the stack for recovery during RETurns and RETI. It always
points to a byte in program memory and has a reset value of 0000h.
Programmer’s Model and Instruction Set
4-3