1
Download GRLIB IP Core User`s Manual
Transcript
COBHAM GAISLER 459 GRIP The DAC interface provides the following control signal: Write Strobe. Note that the Write Strobe signal can also be used as a chip select signal. The Write Strobe output signal is programmable in terms of: Polarity. The Write Strobe signal is asserted during the conversion. The duration of the asserted period of the Write Strobe is programmable in terms of system clock periods. At the end the conversion, an interrupt is generated. The status of an on-going conversion is possible to read out via the AMBA APB slave interface. A DAC conversion is non-interruptible. Conversion WS WS WS Clk WR Data Addr Settings: WRPOL=0 DACWS=0 Figure 120. Digital to analogue conversion waveform, 0 wait states (WS) 43.3 Operation 43.3.1 Interrupt Two interrupts are implemented by the ADC/DAC interface: Index:Name:Description: 0 ADC ADC conversion ready 1 DAC DAC conversion ready The interrupts are configured by means of the pirq VHDL generic. 43.3.2 Reset After a reset the values of the output signals are as follows: Signal:Value after reset: ADO.Aout[7:0]de-asserted ADO.Aen[7:0]de-asserted ADO.Dout[15:0]de-asserted ADO.Den[15:0]de-asserted ADO.WRde-asserted (logical one) ADO.CSde-asserted (logical one) ADO.RCde-asserted (logical one)
