Download PCCextend 100 User`s Manual
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SYCARD TECHNOLOGY PCCextend 100 User's Manual Preliminary M200001-00 Apri/3, 1995 Sycard Technology 1180-F Miraloma Way Sunnyvale, CA 94086 (408) 749-0130 (408) 749-1323 FAX BLACKBERRY Ex. 1004, page 1 BLACKBERRY Ex. 1004, page 2 PCCextend 100 User’s Manual Page 1 1.0 Introduction Sycard Technology's PCCextend 100 PCMCIA extender card is a debug tool for PCMCIA development and test. PCCextend offers the following features: • • • • • • • • • PCCswitch simulates card removal/insertion cycle Low profile design compatible with type I, II and III sockets 4 layer construction to insure low noise environment All 68 pins available as test points Both I/O and memory mode signals clearly marked Vcc, Vpp1 and Vpp2 can be isolated through jumper blocks for current measurements Surface mount resistors and/or capacitors can be added to any signal line Vcc LEDs indicate 3.3V or 5V operation Convenient grounding posts for scope probes or other test equipment 2.0 Using the PCCextend 100 Using the PCCextend is relatively straightforward. The extender card is inserted into the desired slot in the host system. Then the PC Card under test is inserted into the card connector. Caution: Caution Insertion and removal of the extender and PC card should be done with care. The PC Card's fragile connectors may be broken or bent if improper force is used. Both card and extender should be inserted straight without any lateral movement or force. Proper care and use of the extender card will insure years of trouble free operation. M200001-00 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 3 Page 2 PCCextend 100 User’s Manual PCCextend PCMCIA CARD EXTENDER Figure 2.0-1 The PCCextend 100 1994-95 Sycard Technology M200001-00 BLACKBERRY Ex. 1004, page 4 PCCextend 100 User’s Manual Page 3 2.1 Test points All 68-pins of the interface are available to probe through clearly marked headers. Vcc Gnd JP5 WP IOIS16 D1 A0 A2 CD2 GND D2 D0 -C02 GND D9 D10 D8 A4 A3 BVD1/ -STCHG -REG -W AIT A6 A5 A7 -VS2 A24 A12 A16 Vcc -W E A13 A9 -OE -CE1 D6 D4 GND A1 A15 Vpp1 RDY -IRQ A14 A8 A11 A10 07 05 03 RESET A25 A22 A23 Vcc VPP2 A20 A18 -IOW R -VS1 D15 D13 D11 GND Vpp2 BVD2 -SPKR INPACK A21 A19 A17 -IORD -CE2 D14 D12 -CD1 Vpp1 Vcc SW1 CD1 Gnd Vcc 5V JP6 PWR 2.2 Power Indicators Two LED power indicators display the status of the socket’s Vcc. The PWR LED indicates that power is applied to the board. When both the PWR LED and the 5V LED are lit, a Vcc of greater than approximately 3.5V is present. When only the PWR LED is lit, the Vcc is at a level of less than 3.5V. Note: Note The power LEDs are designed to indicate the presence of power on the Vcc supply pins. The LEDs do not provide an accurate measurement of Vcc. Use a voltmeter to determine the actual operating voltage. 2.2 Current Measurements Vcc, Vpp1 and Vpp2 power buses may be isolated from the PC Card socket through three sets of jumper blocks. Each jumper block consists of two sets of jumpers. Both jumpers must be removed to isolate the power. A current meter can be inserted to measure card current consumption. Caution: Caution Care must be taken to insure that the current measuring device is inserted before turning on power to the host socket. Improper power sequencing may cause a damaging latchup condition. 2.3 Using the PCCswitch PCCextend 100 includes the PCCswitch, which can be used to momentarily interrupt the CD1 and CD2 signals. The PCCswitch is centrally located on the PCCextend 100 between the termination area and test points. When properly configured, the PCCswitch can interrupt the card detect signals (-CD1 and -CD2) to simulate a card removal/insertion cycle. Two three pin headers are used to configure the PCCswitch. When both CD1 and CD2 headers are in the “A” position, CD1 and CD2 are routed directly from the host socket to the PCCextend socket. M200001-00 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 5 Page 4 PCCextend 100 User’s Manual When the jumpers are in this position the PCCswitch is not in the circuit. In the “B” position, the host socket’s CD1 and CD2 is routed through the PCCswitch to the CD1 signal on the PCCextend socket. When a card is inserted, CD1 and CD2 may be momentarily interrupted by pressing the PCCswitch. CD2 CD2 CD1 CD1 Position A Position B Figure 2.3-1 Card Detect Switch To test the operation of the PCCswitch, be sure that your PC Card Software drivers are loaded. Momentarily press the PCCtest switch. Most software drivers will issue a removal beep followed by an insertion beep. The software may also remove power from the socket when the card is removed. 2.4 Termination and Prototype Area A termination area located between the test points and the card connector allows access to all PC Card signals. A series of surface mount pads allows the user to add series resistors, pull-down resistor, or capacitance to any signal. The SMT pads are arranged as follows: When shipped from the factory, the resistor pads are shorted with PCB traces. In order to insert series resistor, these traces must be cut prior to soldering the resistor to the board. Pull-down resistors may be inserted by adding a resistor to the corresponding SMT capacitor pad. Filter capacitors may be added by inserting a small capacitor into the corresponding SMT capacitor pad. Figure 2.4-1 and 2.4-2 illustrate the termination areas located on both sides of the PCCextend board. Use this guide when making modifications to the board, since the silk-screen designations may be difficult to read. CD2 -CD2 D2 SW1 R60 C60 R59 C59 WP R3 C3 R2 C2 -CD1 D0 R1 C1 R17 C17 A0 A1 R18 C18 R19 C19 A2 A3 R20 C20 R21 C21 A4 A5 R22 C22 R23 C23 A6 A7 R24 C24 R29 C29 A12 A15 R42 C42 R32 C32 A16 RDY R51 C51 R50 C50 -WE A14 R31 C31 R30 C30 A13 A8 R25 C25 R26 C26 A9 A11 R28 C28 R46 C46 -OE A10 R27 C27 R44 C44 -CE1 D7 R8 C8 R7 C7 D6 D5 R6 C6 R5 C5 D4 R43 C43 R4 C4 D3 -CD1 CD1 Figure 2.4-1 Termination Termination Area - Component Side 1994-95 Sycard Technology M200001-00 BLACKBERRY Ex. 1004, page 6 PCCextend 100 User’s Manual Page 5 R11 D10 C9 R9 D8 C57 R57 BVD2 R54 C55 R55 -INPACK C52 R52 C53 R53 RESET C39 R41 C40 R40 A25 A22 C38 R38 C41 R39 A23 A20 C36 R36 C37 R37 A21 A18 C34 R34 C35 R35 A19 -IOWR C49 R49 C33 R33 A17 -VS1 C47 R47 C48 R48 -IORD D15 C16 R16 C45 R45 -CE2 D13 C14 R14 C15 R15 D14 D11 C12 R12 C13 R13 D12 D9 C10 R10 C11 BVD1 C58 R58 -REG C56 R56 -WAIT C54 -VS2 A24 Figure 2.4-2 Termination Area - Solder Side 2.5 PCCextend Current Protection Device A resettable fuse protects the host from excessive current consumption from the card. Located at R61, the, PolySwitch resettable fuse provides low resistance operation up to 900mA. The PolySwitch fuse may be by passed by soldering a shorting wire across JP4. M200001-00 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 7 Page 6 PCCextend 100 User’s Manual Appendix A. PC Card 68-Pin Interface PC Card Pinout - Memory Mode Pin Name Description Pin Name Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 GND D3 D4 D5 D6 D7 CE1# A10 OE# A11 A9 A8 A13 A14 WE# READY VCC VPP1 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 GND CD1# D11 D12 D13 D14 D15 CE2# VS1# RFU RFU A17 A18 A19 A20 A21 VCC VPP2 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 Ground Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7 Card Enable 1 Address Bit 10 Output Enable Address Bit 11 Address Bit 9 Address Bit 8 Address Bit 13 Address Bit 14 Write Enable Ready/Busy Card Power Programming Supply Voltage 1 Address Bit 16 Address Bit 15 Address Bit 12 Address Bit 7 Address Bit 6 Address Bit 5 Address Bit 4 Address Bit 3 Address Bit 2 Address Bit 1 53 54 55 56 57 58 59 60 61 62 A22 A23 A24 A25 VS2# RESET WAIT# RFU REG# BVD2 29 A0 Address Bit 0 63 BVD1 30 31 32 33 34 D0 D1 D2 WP GND Data Bit 0 Data Bit 1 Data Bit 2 Write Protect Ground 64 65 66 67 68 D8 D9 D10 CD2# GND Ground Card Detect 1 Data Bit 11 Data Bit 12 Data Bit 13 Data Bit 14 Data Bit 15 Card Enable 2 Voltage Sense 1 Reserved Reserved Address Bit 17 Address Bit 18 Address Bit 19 Address Bit 20 Address Bit 21 Card Power Programming Supply Voltage 2 Address Bit 22 Address Bit 23 Address Bit 24 Address Bit 25 Voltage Sense 2 Card Reset Extend Bus Cycle Reserved Register Select Battery Voltage Detect 2 Battery Voltage Detect 1 Data Bit 8 Data Bit 9 Data Bit 10 Card Detect 2 Ground 19 20 21 22 23 24 25 26 27 28 1994-95 Sycard Technology M200001-00 BLACKBERRY Ex. 1004, page 8 PCCextend 100 User’s Manual Page 7 PC Card Pinout - I/O Mode Pin Name Description Pin Name Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 GND D3 D4 D5 D6 D7 CE1# A10 OE# A11 A9 A8 A13 A14 WE# IREQ# VCC VPP1 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 GND CD1# D11 D12 D13 D14 D15 CE2# VS1# IORD# IOWR# A17 A18 A19 A20 A21 VCC VPP2 19 20 21 22 23 24 25 26 A16 A15 A12 A7 A6 A5 A4 A3 Ground Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7 Card Enable 1 Address Bit 10 Output Enable Address Bit 11 Address Bit 9 Address Bit 8 Address Bit 13 Address Bit 14 Write Enable Interrupt Request Card Power Programming Supply Voltage 1 Address Bit 16 Address Bit 15 Address Bit 12 Address Bit 7 Address Bit 6 Address Bit 5 Address Bit 4 Address Bit 3 53 54 55 56 57 58 59 60 A22 A23 A24 A25 VS2# RESET WAIT# INPACK# Ground Card Detect 1 Data Bit 11 Data Bit 12 Data Bit 13 Data Bit 14 Data Bit 15 Card Enable 2 Voltage Sense 1 I/O Read Strobe I/O Write Strobe Address Bit 17 Address Bit 18 Address Bit 19 Address Bit 20 Address Bit 21 Card Power Programming Supply Voltage 2 Address Bit 22 Address Bit 23 Address Bit 24 Address Bit 25 Voltage Sense 2 Card Reset Extend Bus Cycle Input Port Acknowledge 27 A2 Address Bit 2 61 REG# 28 A1 Address Bit 1 62 SPKR# 29 30 31 32 33 34 A0 D0 D1 D2 IOIS16# GND Address Bit 0 Data Bit 0 Data Bit 1 Data Bit 2 IO Port is 16 bits Ground 63 64 65 66 67 68 STSCHG# D8 D9 D10 CD2# GND M200001-00 Register and I/O select enable Digital Audio Waveform Card Status Changed Data Bit 8 Data Bit 9 Data Bit 10 Card Detect 2 Ground 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 9 Page 8 PCCextend 100 User’s Manual 68 pin Card Side Connector - 5 Volt Pin 1 Pin 34 Surface A Surface B Pin 35 Pin 68 68 pin Socket - 5 Volt (System side) Front view Pin 1 Pin 34 Pin 68 Pin 35 Right angle connector hole pattern - Top side #1 #33 #34 #2 #67 #35 #36 #68 INSERT CARD Right angle connector hole pattern - Bottom Side #33 #1 #34 #2 #67 #35 #68 #36 INSERT CARD 1994-95 Sycard Technology M200001-00 BLACKBERRY Ex. 1004, page 10 PCCextend 100 User’s Manual Page 9 B. PC Card Timing Reference B.1 I/O Read Timing A[2 5:0] T101 RE G# T100 T102 CE[1:0]# T103 T104 T115 T105 IORD# IN P A C K # T1 07 T1 06 IOIS16# T108 T114 T109 W AIT# T110 T111 T113 T112 Dout I/O Read Timing Ref T100 T101 T102 T103 T104 T105 T106 T107 T108 T109 T110 T111 T112 T113 T114 T115 M200001-00 Symbol tsuREG thA thREG tsuCE tsuA (IORD) twIORD tdfINPACK tdrINPACK tdfIOIS16 td (IORD) tdWT tw td (WT) th (IORD) tdrIOIS16 (ADR) thCE Description REG# setup to IORD# Address hold after IORD# de-asserted REG# hold after IORD# de-asserted CE# to IORD# setup time Address setup before IORD# IORD# strobe width INPACK# delay from IORD# active INPACK# delay from IORD# inactive IOIS16# delay from Address valid Data Valid after IORD# IORD# to WAIT# delay WAIT# width Data Valid after WAIT# inactive Data hold after IORD# de-asserted IOIS16# delay from address invalid Min 5ns 20ns 0ns 5ns 70nS 165ns 0ns CE# hold after IORD# inactive 20ns Max 45ns 45ns 35ns 100ns 35ns 12us 0ns 0ns 35ns 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 11 Page 10 PCCextend 100 User’s Manual B.2 I/O Write Timing A[25:0] T1 01 R EG # T100 T102 CE[1:0]# T103 T1 15 T105 IOW R# T104 IOIS16# T108 T114 W AIT# T109 T1 10 T1 13 T111 T112 D in I/O Write Timing Ref T100 T101 T102 T103 T104 T105 T108 T109 T110 T111 T112 T113 T114 T115 Symbol tsuREG (IOWR) thA (IOWR) thREG (IOWR) tsuCE (IOWR) tsuA (IOWR) twIOWR tdfIOIS16 tsu (IOWR) tdWT (IOWR) tw WT tdr IOWR (WT) th (IOWR) tdrIOIS16 (ADR) thCE(IOWR) 1994-95 Sycard Technology Description REG# setup to IOWR# Address hold after IOWR# de-asserted REG# hold after IOWR# de-asserted CE# to IOWR# setup time Address setup before IOWR# IOWR# strobe width IOIS16# delay from Address valid Data Setup before IOWR# IOWR# to WAIT# delay WAIT# width WAIT# deasserted to IOWR# deasserted Data hold after IOWR# de-asserted IOIS16# delay from address invalid Min 5ns 20ns 0ns 5ns 70nS 165ns CE# hold after IOWR# de-asserted 20ns Max 35ns 60ns 35ns 12us 0ns 30ns 35ns M200001-00 BLACKBERRY Ex. 1004, page 12 PCCextend 100 User’s Manual Page 11 B.3 Memory Read Timing T100 T101 T102 A[25:0], REG# T114 T111 T103 CE[1:0]# T104 OE# T105 T106 T115 T107 WAIT# T108 T109 Din T110 T112 Memory Read Timing Ref Symbol Description T100 T101 T102 T103 T104 T105 T106 T107 T109 T110 T111 T112 T114 T115 tcR ta(A) th (A) ta (CE) ta (OE) tsu (A) tv (WT-OE) tw (WT) ten (OE) tv (WT) tdis (OE) ten(CE) tsu(CE) th(CE) Read Cycle Time Address access time Address hold time CE# access time OE# access time Address setup time WAIT# Valid from OE# WAIT# Pulse width Output enable time from OE# Data setup for WAIT# released Output disable inactive to data float Output enable time from CE# CE# setup time CE# hold after OE# inactive Min 600ns 600ns Max Min 250ns 600ns 35ns 250ns Max 250ns 20ns 600ns 300ns 100ns 250ns 125ns 30ns 100ns 12us 5ns 0ns 35ns 12us 5ns 0ns 150ns 5ns 0ns 35ns 100ns 5ns 0ns 20ns Note: Note All timing for 250ns accesses to common memory. 600ns cycle times apply for 3.3V operation. M200001-00 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 13 Page 12 PCCextend 100 User’s Manual B.4 Memory Write Timing T100 A[25:0], REG# T117 T101 CE[1:0]# T102 OE# T104 T103 T106 WE# T107 T108 T109 T105 T110 WAIT# T118 T114 T111 T112 Din T113 Dout T115 T116 Memory Write Timing Ref Symbol Description T100 T101 T102 T103 T104 T105 T106 T107 T108 T109 T110 T111 T112 T113 T114 T115 T116 T117 T118 tcW tsu(CE - WEH) tsu(A-WEH) trc(WE) tsu(OE-WE) th(CE) tw(WE) tsu(A) tv(WT-WE) tw(WT) tv(WT) tsu(D-WEH) th(D) tdis(OE) ten(OE) ten(WE) tdis(WE) tsu(CE) th(OE-WE) Write cycle time CE# active to WE# high Address valid to WE# high Write recover time Output enable setup OE# to WE# CE# hold time WE# pulse width Address setup time WAIT# valid from WE# active WAIT# pluse width WE# high from WAIT# inactive Data setup time Data hold time Output disable time from OE# inactive Output enable time from OE# active Output enable time from WE# inactive Output disable from WE# active CE# setup time Output enable hold from WE# Min 600ns 300ns 350ns 70ns 35ns 35ns 300ns 50ns 600ns Max Min 250ns 180ns 180ns 30ns 10ns 20ns 150ns 30ns 100ns 12us 0ns 150ns 70ns 35ns 12us 0ns 80ns 30ns 150ns 5ns 5ns 100ns 5ns 5ns 150ns 0ns 35ns 250ns Max 100ns 0ns 10ns Note: Note All timing for 250ns speed version. 600ns cycle times apply for 3.3V operation. See PC Card Standard for other speed versions. 1994-95 Sycard Technology M200001-00 BLACKBERRY Ex. 1004, page 14 PCCextend 100 User’s Manual Page 13 C. PCCextend 100 Schematic M200001-00 1994-95 Sycard Technology BLACKBERRY Ex. 1004, page 15 SW1 PUSHBUTTON CD1 1 2 3 HEADER 3 CD[0..15] CD[0..15] WP CD1 CA0 CA2 CA4 CA6 CA12 CA16 *CD1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 CD3 CD4 CD5 CD6 CD7 *CE1 *CE1 CA10 *OE *OE VCC CA11 CA9 CA8 CA13 CA14 *WE/*PGM RDY/*BSY *WE/*PGM RDY/*BSY VPP1 VPP1 WP CA16 CA15 CA12 CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0 CD0 CD1 CD2 WP P1 GND GND CD1 D3 D4 D11 D5 D12 D6 D13 D7 D14 CE1 D15 CE2 A10 OE RFSH A11 IORD A9 IOWR A8 A17 A13 A18 A14 A19 WE/PGM A20 RDY/BSY A21 VCCX VCCX VPP2 VPP1 A22 A16 A23 A15 A24 A12 A25 A7 RFU A6 RESET A5 WAIT A4 A3 INPACK A2 REG A1 BVD2 A0 BVD1 D0 D8 D1 D9 D2 D10 WP CD2 GND GND PCMCIA 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 CD2 1 2 3 HEADER 3 *CD1P CD11 CD12 CD13 CD14 CD15 *CD2 *CE2 *CE2 VS1 *IORD *IOWR VS1 *IORD *IOWR CA17 CA18 CA19 CA20 CA21 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 J2 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 18 17 20 19 22 21 24 23 26 25 28 27 30 29 32 31 34 33 2 X 17 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 CD2 CD0 CA1 CA3 CA5 CA7 CA15 VPP1 RDY/*BSY CA14 CA8 CA11 CA10 CD7 CD5 CD3 VPP2 CA22 CA23 CA24 CA25 VS2 CRESET *WAIT *INPACK *REG BVD2 BVD1 CA[0..25] J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 2 X 17 VCC VPP2 CD8 CD9 CD10 VCC 1 3 5 7 9 11 13 15 17 *WE/*PGM 19 CA13 21 CA9 23 *OE 25 *CE1 27 CD6 29 CD4 31 33 *CD2 CD9 BVD1 *REG *WAIT VS2 CA24 CA22 CRESET *WAIT *INPACK *REG BVD2 BVD1 VCC *CD2P VS2 VS2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 CA20 CA18 *IOWR VS1 CD15 CD13 CD11 CD10 CD8 BVD2 *INPACK CRESET CA25 CA23 VPP2 CA21 CA19 CA17 *IORD *CE2 CD14 CD12 *CD1 CA[0..25] HOST SIDE CONNECTOR Sycard Technology Title FILE=PCCEXT1.S31 PCCextend 100 - Host Connector Size Document Number B 140002 Date: April 4, 1995 Sheet 1 of BLACKBERRY Ex. 1004, page 16 REV A 4 CD[0..15] CD[0..15] CDF[0..15] R1 CD0 CDF0 CDF[0..15] 0 OHM CAF[0..25] R2 C1 CAP CD1 CAF0 R18 CAP C17 CAP CAF1 R19 CAP CAF2 R20 CAP CAF3 R21 CAP CAF4 R22 CAP CAF5 R23 CAP CAF6 R24 CAP CAF7 R25 CAP CAF8 R26 CAF9 R27 CAF10 0 OHM R28 C27 CAP CA11 C12 CAP CAF11 0 OHM CDF12 0 OHM R29 C28 CAP CA12 R14 C13 CAP CAF12 0 OHM CDF13 0 OHM R30 C29 CAP CAF13 CA13 R15 C14 CAP CD14 0 OHM CDF14 0 OHM R31 C30 CAP CAF14 CA14 R16 C15 CAP CD15 0 OHM CDF15 0 OHM R42 C31 CAP CAF15 CA15 C16 CAP C40 CAP 0 OHM CDF11 CD13 CAF25 C26 CAP CA10 C11 CAP CD12 C39 CAP 0 OHM 0 OHM R13 R40 CA25 0 OHM CDF10 R12 CAF24 C25 CAP CA9 C10 CAP CD11 C41 CAP 0 OHM 0 OHM R11 R41 CA24 0 OHM CDF9 CD10 CAF23 C24 CAP CA8 C9 C38 CAP 0 OHM 0 OHM R10 R39 CA23 0 OHM CDF8 CD9 CAF22 C23 CAP CA7 C8 C37 CAP 0 OHM 0 OHM R9 R38 CA22 0 OHM CDF7 CD8 CAF21 C22 CAP CA6 C7 C36 CAP 0 OHM 0 OHM R8 R37 CA21 0 OHM CDF6 CD7 CAF20 C21 CAP CA5 C6 C35 CAP 0 OHM 0 OHM R7 R36 CA20 0 OHM CDF5 CD6 CAF19 C20 CAP CA4 C5 C34 CAP 0 OHM 0 OHM R6 R35 CA19 0 OHM CDF4 CD5 CAF18 C19 CAP CA3 C4 C33 CAP 0 OHM 0 OHM R5 R34 CA18 0 OHM CDF3 CD4 CAF17 C18 CAP CA2 C3 C32 CAP 0 OHM 0 OHM R4 R33 CA17 0 OHM CDF2 CD3 CAF16 0 OHM CA1 C2 CD2 R32 CA16 0 OHM CDF1 0 OHM R3 CAF[0..25] R17 CA0 0 OHM C42 CAP CA[0..25] FILE=PCCEXT2.S31 CA[0..25] Sycard Technology Title PCCextend 100 - Data/Address Filters Size Document Number B 140002 Date: April 4, 1995 Sheet 2 of BLACKBERRY Ex. 1004, page 17 REV A 4 R43 *CD1 *CD1 *CD1F *CD1F 0 OHM R44 *CE1 C43 CAP *CE1 *CE1F *CE1F 0 OHM R45 *CE2 C44 CAP *CE2 *CE2F *CE2F 0 OHM R46 *OE C45 CAP *OE *OEF *OEF 0 OHM R47 *VS1 C46 CAP VS1 VS1F VS1F 0 OHM R48 *IORD C47 CAP *IORD *IORDF *IORDF 0 OHM R49 *IOWR C48 CAP *IOWR *IOWRF *IOWRF 0 OHM R50 *WE/*PGM C49 CAP *WE/*PGM *WE/*PGMF *WE/*PGMF 0 OHM R51 RDY/*BSY C50 CAP RDY/*BSY RDY/*BSYF RDY/*BSYF 0 OHM R52 VS2 C51 CAP VS2 VS2F VS2F 0 OHM R53 CRESET C52 CAP CRESET RESETF RESETF 0 OHM R54 *WAIT C53 CAP *WAIT *WAITF *WAITF 0 OHM R55 *INPACK C54 CAP *INPACK *INPACKF *INPACKF 0 OHM R56 *REG C55 CAP *REG *REGF *REGF 0 OHM R57 BVD2 C56 CAP BVD2 BVD2F BVD2F 0 OHM R58 BVD1 C57 CAP BVD1 BVD1F BVD1F 0 OHM R59 WP C58 CAP WPF WP WPF 0 OHM R60 *CD2 Sycard Technology C59 CAP *CD2F *CD2 0 OHM C60 CAP FILE=PCCEXT3.S31 *CD2F Title PCCextend 100 - SIGNAL FILTERS Size Document Number B 140002 Date: January 11, 1995 Sheet 3 of BLACKBERRY Ex. 1004, page 18 REV A 4 5V LED R62 D1 D2 100 ohm LED 3.3V ZENER R63 D3 *CD1F 220 ohm CDF[0..15] LED POWER LED *CD1F CDF[0..15] JP4 JUMPER VCC R61 VCC2 JP3 CDF3 CDF4 CDF5 CDF6 CDF7 JUMPER VARISTOR JP5 JUMPER C65 0.1uF C64 0.1uF C63 10uF *CE1F *CE1F CAF10 *OEF *OEF CAF11 CAF9 CAF8 CAF13 CAF14 JP6 JUMPER VCC2 JP1 VPP1 *WE/*PGMF RDY/*BSYF VPP1 *WE/*PGMF RDY/*BSYF VPP1A CAF16 CAF15 CAF12 CAF7 CAF6 CAF5 CAF4 CAF3 CAF2 CAF1 CAF0 CDF0 CDF1 CDF2 JUMPER JP2 VPP2 VPP2 VPP2A C61 0.1uF JUMPER C62 0.1uF WPF CAF[0..25] WPF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 J3 GND GND CD1 D3 D11 D4 D12 D5 D13 D6 D14 D7 D15 CE1 CE2 A10 OE RFSH IORD A11 A9 IOWR A8 A17 A13 A18 A14 A19 WE/PGM A20 RDY/BSY A21 VCCX VCCX VPP2 VPP1 A22 A16 A23 A15 A24 A12 A25 A7 RFU A6 RESET A5 WAIT A4 A3 INPACK A2 REG A1 BVD2 A0 BVD1 D0 D8 D1 D9 D2 D10 WP CD2 GND GND PCMCIA 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 *CD1F CDF11 CDF12 CDF13 CDF14 CDF15 *CE2F VS1F *IORDF *IOWRF CAF17 CAF18 CAF19 CAF20 CAF21 *CE2F VS1F *IORDF *IOWRF VCC2 VPP2A CAF22 CAF23 CAF24 CAF25 VS2F CDF8 CDF9 CDF10 RESETF RESETF *WAITF *INPACKF *WAITF *INPACKF *REGF *REGF BVD2F BVD2F BVD1F BVD1F *CD2F VS2F *CD2F VS2F CAF[0..25] SOCKET SIDE CONNECTOR Sycard Technology Title FILE=PCCEXT4.S31 PCCextend 100 - Card Connector Size Document Number B 140002 Date: April 6, 1995 Sheet 4 of BLACKBERRY Ex. 1004, page 19 REV A 4